Eduard Ayguade Parra

2016

• MUSA: A Multi-level Simulation Approach for Next-generation HPC Machines

  Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis

  T. Grass, C. Allande, A. Armejach, A. Rico, E. Ayguade, J. Labarta, M. Valero, M. Casas, and M. Moreto
• Analyzing the effect of last level cache sharing on integrated platforms with fine-grain CPU-GPU collaboration

  GPU Technology Conference Euope (GTC Europe)

  V. Garcia, J. Gomez-Luna, T. Grass, A. Rico, A. J. Pena, and E. Ayguade
• Evaluating the effect of last-level cache sharing on integrated GPU-CPU systems with heterogeneous applications

  Workload Characterization (IISWC), 2016 IEEE International Symposium on

  V. Garcia, J. Gomez-Luna, T. Grass, A. Rico, E. Ayguade, and A. J. Pena
• AXIOM: A Hardware-Software Platform for Cyber Physical Systems

  2016 Euromicro Conference on Digital System Design (DSD)

  S. Mazumdar, E. Ayguade, N. Bettin, J. Bueno, S. Ermini, A. Filgueras, D. Jiménez-González, C. Alvarez Martinez, X. Martorell, F. Montefoschi, D. Oro, D. Pnevmatikatos, A. Rizzo, D. Theodoropoulos, and R. Giorgi
• POSTER: Exploiting Asymmetric Multi-Core Processors with Flexible System Sofware

  Proceedings of the 2016 International Conference on Parallel Architectures and Compilation - PACT '16

  K. Chronaki, M. Moreto, M. Casas, A. Rico, R. M. Badia, E. Ayguade, J. Labarta, and M. Valero
• Multiple Target Task Sharing Support for the OpenMP Accelerator Model

  OpenMP: Memory, Devices, and Tasks. 12th International Workshop on OpenMP, IWOMP 2016, Nara, Japan, October 5-7, 2016, Proceedings

  G. Ozen, S. Mateo, E. Ayguade, J. Labarta, and J. Beyer
• The Secrets of the Accelerators Unveiled: Tracing Heterogeneous Executions Through OMPT

  OpenMP: Memory, Devices, and Tasks. 12th International Workshop on OpenMP, IWOMP 2016, Nara, Japan, October 5-7, 2016, Proceedings

  G. Llort, A. Filgueras, D. Jiménez-González, H. Servat, X. Teruel, E. Mercadal, C. Álvarez, J. Giménez, X. Martorell, E. Ayguade, and J. Labarta
• Reducing Cache Coherence Traffic with Hierarchical Directory Cache and NUMA-Aware Runtime Scheduling

  Proceedings of the 2016 International Conference on Parallel Architectures and Compilation - PACT '16

  P. Caheny, M. Casas, M. Moreto, H. Gloaguen, M. Saintes, E. Ayguade, J. Labarta, and M. Valero
• Large-Memory Nodes for Energy Efficient High-Performance Computing

  Proceedings of the Second International Symposium on Memory Systems (MEMSYS '16)

  D. Zivanovic, M. Radulovic, G. Llort, D. Zaragoza, J. Strassburg, P. Carpenter, P. Radojkovic, and E. Ayguade
• On the Representativeness of Convolutional Neural Networks Layers

  Artificial Intelligence Research and Development. 19th International Conference of the Catalan Association for Artificial Intelligence (CCIA 2016)

  D. Garcia-Gasulla, J. Moreno, R. Ramos-Pollán, R. Casadiegos Barrios, J. Bejar, U. Cortés, E. Ayguade, J. Labarta, and T. Suzumura