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We are particularly interested for this role in the strengths and lived experiences of women and underrepresented groups to help us avoid perpetuating biases and oversights in science and IT research. In instances of equal merit, the incorporation of the under-represented sex will be favoured.
We promote Equity, Diversity and Inclusion, fostering an environment where each and every one of us is appreciated for who we are, regardless of our differences.
If you consider that you do not meet all the requirements, we encourage you to continue applying for the job offer. We value diversity of experiences and skills, and you could bring unique perspectives to our team.
The objective of this position is to design and implement in hardware the aforementioned vector architectures to improve its readiness as a hardware IP ready to be integrated into ongoing BSC projects and as modules to be included in other projects as part of a BSC spinoffs. The primary goals include: (i) Designing the microarchitecture of different modules from the vector architectures, (ii) implementing in RTL language these designs and (iii) evaluating the implementations in FPGA and transistor-level simulators. The engineer is expected to have some experience (either in industry or academia) on RTL design and simulation.
- Perform microarchitecture design and evaluation using different tools with High Performance Computing requirements as part of a team.
- Learn and develop different verification techniques for hardware systems.
- Publish the results obtained during the development of the work in international conferences.
- Coordinate with a local team at BSC and an international team from different European institutions.
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Education
- Master degree in Computer architecture, Electronics, Circuits, Systems, Computer Sciences, Telecommunications or Automation.
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Essential Knowledge and Professional Experience
- Practical experience modeling digital hardware using different simulation tools (snipersim, gem5, zsim, among others).
- Knowledge on digital processor and microcontroller designs, either as part of his/her studies or work experience.
- Knowledge on SystemVerilog and C++ languages.
- Knowledge on RTL design, testing and verification.
- Knowledge with RTL simulators such as Verilator.
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Additional Knowledge and Professional Experience
- Knowledge on processor microarchitecture (e.g. RISC-V, Arm, Infineon, Intel, or AMD processors among others) is welcome.
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Competences
- Problem-solving, pro-active, result-oriented work attitude.
- Good communication skills including a good command of the English language (written and spoken
- The position will be located at BSC within the Computer Sciences Department
- We offer a full-time contract (37.5h/week), a good working environment, a highly stimulating environment with state-of-the-art infrastructure, flexible working hours, extensive training plan, restaurant tickets, private health insurance, support to the relocation procedures
- Duration: Open-ended contract due to technical and scientific activities linked to the project and budget duration
- Holidays: 23 paid vacation days plus 24th and 31st of December per our collective agreement
- Salary: we offer a competitive salary commensurate with the qualifications and experience of the candidate and according to the cost of living in Barcelona
- Starting date: May 1st, 2025
- A full CV in English including contact details
- A cover/motivation letter with a statement of interest in English, clearly specifying for which specific area and topics the applicant wishes to be considered. Additionally, two references for further contacts must be included. Applications without this document will not be considered.
Development of the recruitment process
The selection will be carried out through a competitive examination system ("Concurso-Oposición"). The recruitment process consists of two phases:
- Curriculum Analysis: Evaluation of previous experience and/or scientific history, degree, training, and other professional information relevant to the position. - 40 points
- Interview phase: The highest-rated candidates at the curriculum level will be invited to the interview phase, conducted by the corresponding department and Human Resources. In this phase, technical competencies, knowledge, skills, and professional experience related to the position, as well as the required personal competencies, will be evaluated. - 60 points. A minimum of 30 points out of 60 must be obtained to be eligible for the position.
The recruitment panel will be composed of at least three people, ensuring at least 25% representation of women.
In accordance with OTM-R principles, a gender-balanced recruitment panel is formed for each vacancy at the beginning of the process. After reviewing the content of the applications, the panel will begin the interviews, with at least one technical and one administrative interview. At a minimum, a personality questionnaire as well as a technical exercise will be conducted during the process.
The panel will make a final decision, and all individuals who participated in the interview phase will receive feedback with details on the acceptance or rejection of their profile.
At BSC, we seek continuous improvement in our recruitment processes. For any suggestions or comments/complaints about our recruitment processes, please contact recruitment [at] bsc [dot] es.
For more information, please follow this link.
BSC-CNS is an equal opportunity employer committed to diversity and inclusion. We are pleased to consider all qualified applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or any other basis protected by applicable state or local law.
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