[HYBRID] PATC: Heterogeneous Programming on FPGAs with OmpSs@FPGA

Date: 25/Mar/2022 Time: 09:30 - 17:30


The course will take place in Hybrid format and will be held in-person within the UPC premises: Department of Computer Architecture (DAC). Room C6-220, Barcelona, Spain; and also, online via Zoom with required registration.

Target group: Intermediate/Advanced

Cost: There is no registration fee. The attendees would need to cover the expenses for travel, accommodation and meals.

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Day 1 (Friday March, 25th)

Session 1 / 9:30am – 1:00 pm (1h lectures, 2h practical, with a pair of short breaks)

All (presential (C6-102) and online (Zoom) - Everywhere)*

09.30h – Intro and welcome
10:00h - OmpSs@FPGA Overview and Internals
10.40h - HLS highlights
11:00h - Case of Study: Step-by-Step Optimization w/ Interactive Quiz

13:00h – Lunch Break

Session 2 / 2:00pm – 4:00 pm

Only for people attending on site (A5S112), as Zedboard FPGAs will be lent to attendees*

14.00h – Hands-on: Matrix multiply on Zedboard (same case as step-by-step)*
16:00h - Adjourn

* Zedboard FPGAs provided to do the hands-on.