Mateo Valero Cortes

2011

• {TMbox}: A Flexible and Reconfigurable 16-Core Hybrid Transactional Memory System

  Proc. FCCM '11

  N. Sonmez, O. Arcas, O. Pflucker, O. Unsal, A. Cristal, I. Hur, S. Singh, and M. Valero
• Integrating dataflow abstractions into transactional memory

  Systems for Future Multi-Core Architectures (SFMA'11)

  V. Gajinov, A. Cristal, M. Milovanovic, E. Ayguade, O. Unsal, and M. Valero
• True Vector Extensions for Decision Support DBMS Acceleration

  T. Hayes, O. Palomar, O. Unsal, A. Cristal, and M. Valero
• FaulTM-multi: Fault Tolerance for Multithreaded Applications Running on Transactional Memory Hardware

  Workshop on Wild and Sane Ideas in Speculation and Transactions

  G. Yalcin, O. Unsal, A. Cristal, and M. Valero
• FIMSIM: A fault injection infrastructure for microarchitectural simulators

  29th International Conference on Computer Design (ICCD)

  G. Yalcin, O. Unsal, A. Cristal, and M. Valero
• SymptomTM: Symptom Based Error Detection and Recovery Using Hardware Transactional Memory

  Parallel Architectures and Compilation Techniques (PACT)

  G. Yalcin, O. Unsal, A. Cristal, I. Hur, and M. Valero
• Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory

  Parallel Architectures and Compilation Techniques (PACT)

  A. Armejach, A. Seyedi, R T. J. Gil, I. Hur, O. Unsal, A. Cristal, and M. Valero
• Rapid Development of Error-Free Architectural Simulators using Dynamic Runtime Testing

  23rd International Symposium on Computer Architecture and High Performance Computing

  S. Tomić, A. Cristal, O. Unsal, and M. Valero
• A Flexible Hybrid Transactional Memory Multicore on FPGA

  Jornadas de Paralelismo 2011

  O. Arcas, N. Sönmez, O. Unsal, A. Cristal, and M. Valero
• Object Oriented execution Model (OOM)

  New Directions in Computer Architecture (NDCA-2)

  N. Markovic, D. Nemirovsky, R. González, O. Unsal, M. Valero, and A. Cristal