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2014

APMC: Advanced Pattern based Memory Controller

22nd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

T. Hussain, O. Palomar, O. Unsal, A. Cristal, E. Ayguade, M. Valero, and S. Kumar Rethinagiri
Stand-alone Memory Controller for Graphics System

The 10th International Symposium on Applied Reconfigurable Computing (ARC 2014)

T. Hussain, O. Palomar, O. Unsal, A. Cristal, E. Ayguade, M. Valero, and A. Haider
PVMC: Programmable Vector Memory Controller

IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2014)

T. Hussain, O. Palomar, O. Unsal, A. Cristal, E. Ayguade, and M. Valero
Advanced Pattern based Memory Controller for FPGA based HPC Applications

International Conference on High Performance Computing {&} Simulation, HPCS 2014

T. Hussain, O. Palomar, O. Unsal, A. Cristal, E. Ayguade, and M. Valero
MAPC. Memory Access Pattern based Controller

24th International Conference on Field Programmable Logic and Applications (FPL), 2014

T. Hussain, O. Palomar, O. Unsal, A. Cristal, E. Ayguade, and M. Valero
A Case Study of Hybrid Dataflow and Shared-memory Programming Models: Dependency-based Parallel Game Engine

26th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2014

V. Gajinov, I. Eric, S. Stojanovic, V. Milutinovic, O. Unsal, E. Ayguade, and A. Cristal
DaSH: A Benchmark for Hybrid Dataflow and Shared Memory Programming Models

ACM International Conference on Computing Frontiers

V. Gajinov, I. Eric, S. Stipic, O. Unsal, E. Ayguade, and A. Cristal
EVX: Vector Execution on Low Power EDGE Cores

ACM/IEEE Design, Automation, and Test in Europe 2014

M. Duric, O. Palomar, A. Smith, O. Unsal, A. Cristal, M. Valero, and D. Burger
Dynamic-Vector Execution on a General Purpose EDGE Chip Multiprocessor

14th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2014)

M. Duric, O. Palomar, A. Smith, Milan Stanic, O. Unsal, A. Cristal, and M. Valero
Neighbor-cell assisted error correction for MLC NAND flash memories

SIGMETRICS

Y. Cai, G. Yalcin, O. Mutlu, E. Haratsch, O. Unsal, A. Cristal, and K. Mai

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