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2011

FIMSIM: A fault injection infrastructure for microarchitectural simulators

29th International Conference on Computer Design (ICCD)

G. Yalcin, O. Unsal, A. Cristal, and M. Valero
SymptomTM: Symptom Based Error Detection and Recovery Using Hardware Transactional Memory

Parallel Architectures and Compilation Techniques (PACT)

G. Yalcin, O. Unsal, A. Cristal, I. Hur, and M. Valero
Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory

Parallel Architectures and Compilation Techniques (PACT)

A. Armejach, A. Seyedi, R T. J. Gil, I. Hur, O. Unsal, A. Cristal, and M. Valero
Rapid Development of Error-Free Architectural Simulators using Dynamic Runtime Testing

23rd International Symposium on Computer Architecture and High Performance Computing

S. Tomić, A. Cristal, O. Unsal, and M. Valero
A Flexible Hybrid Transactional Memory Multicore on FPGA

Jornadas de Paralelismo 2011

O. Arcas, N. Sönmez, O. Unsal, A. Cristal, and M. Valero
DiDi: Mitigating The Performance Impact of TLB Shootdowns Using A Shared TLB Directory

Parallel Architectures and Compilation Techniques (PACT)

C. Villavieja, V. Karakostas, L. Vilanova, Y. Etsion, A. Ramirez, A. Mendelson, N. Navarro, A. Cristal, and O. Unsal
Interchangeable Back Ends for STM Compilers

6th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT)

G. Kestor, L. Dalessandro, A. Cristal, M. L. Scott, and O. Unsal
Object Oriented execution Model (OOM)

New Directions in Computer Architecture (NDCA-2)

N. Markovic, D. Nemirovsky, R. González, O. Unsal, M. Valero, and A. Cristal
A Comprehensive Study of Conflict Resolution Policies in Hardware Transactional Memory

6th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT)

E. Akpinar, S. Tomić, A. Cristal, O. Unsal, and M. Valero
Circuit Design of a Dual-Versioning L1 Data Cache for Optimistic Concurrency

21st Great Lakes Symposium on Very Large Scale Integration (GLSVLSI'11)

A. Seyedi, A. Armejach, A. Cristal, O. Unsal, I. Hur, and M. Valero

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