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2010

The Velox Transactional Memory Stack

Micro, IEEE

P. Felber, E. Rivière, W. M. Moreira, D. Harmanci, P. Marlier, S. Diestelhorst, M. Hohmuth, M. Pohlack, A. Cristal, I. Hur, O. Unsal, P. Stenström, A. Dragojevic, R. Guerraoui, M. Kapalka, V. Gramoli, U. Drepper, S. Tomić, Y. Afek, G. Korland, N. Shavit, C. Fetzer, M. Nowack, and T. Riegel
AuRUS: Automated Reasoning on UML/OCL Schemas

ER

A. Queralt, G. Rull, E. Teniente, C. Farré, and T. Urp\'ı
ZNRD1 (zinc ribbon domain-containing 1) is a host cellular factor that influences HIV-1 replication and disease progression.

Clinical infectious diseases : an official publication of the Infectious Diseases Society of America

E. Ballana, J. Senserrich, E. Pauls, R. Faner, J M. Mercader, F. Uyttebroeck, E. Palou, M P. Mena, E. Grau, B. Clotet, L. Ruiz, A. Telenti, A. Ciuffi, and J. A. Esté
Transferrin receptor-1 gene polymorphisms are associated with type 2 diabetes.

European journal of clinical investigation

J M. Fernández-Real, J M. Mercader, F J. Ortega, J M. Moreno-Navarrete, P. López-Romero, and W. Ricart
Graphical Representations of Protein Sequences for Alignment-Free Comparative and Predictive Studies. Recognition of Protease Inhibition Pattern from H-Depleted Molecular Graph Representat

Bioinformatics

M. Fernández, J. Caballero, L. Fernández, and et. al.
ShadowHTM: Using a dual-bitcell L1 Data Cache to Improve Hardware Transactional Memory Performance

A. Armejach, A. Seyedi, R T. J. Gil, I. Hur, O. Unsal, A. Cristal, and M. Valero
Architectural Support for Fair Reader-Writer Locking

International Symposium on Microarchitecture

E. Vallejo, R. Beivide, A. Cristal, T. Harris, F. Vallejo, O. Unsal, and M. Valero
Debugging Programs that use Atomic Blocks and Transactional Memory

15th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming (PPoPP 2010)

F. Zyulkyarov, T. Harris, O. Unsal, A. Cristal, and M. Valero
RMS-TM: A challenging transactional memory benchmark suite

Advanced Computer Architecture and Computation for Embedded Systems (ACACES 2010)

V. Karakostas, G. Kestor, O. Unsal, A. Cristal, I. Hur, and M. Valero
FaulTM: Fault-Tolerance Using Hardware Transactional Memory

Workshop on Parallel Execution of Sequential Programs on Multi-core Architecture (PESPMA)

G. Yalcin, O. Unsal, I. Hur, and A. Cristal

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