Publications

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2010

Comparing last-level cache designs for CMP architectures

IFMT '10: International Forum on Next-Generation Multicore/Manycore Technologies

A. Vega, A. Rico, F. Cabarcas, A. Ramirez, and M. Valero
Task Superscalar: Using Processors as Functional Units

USENIX Workshop on Hot Topics In Parallelism (HotPar)

Y. Etsion, A. Ramirez, R. M. Badia, E. Ayguade, J. Labarta, and M. Valero
Task Superscalar: An Out-of-Order Task Pipeline

IEEE/ACM Intl. Symp. on Microarchitecture (MICRO-43)

Y. Etsion, F. Cabarcas, A. Rico, A. Ramirez, R. M. Badia, E. Ayguade, J. Labarta, and M. Valero
Scalability Analysis of Progressive Alignment in a Multicore

International Workshop on Multi-Core Computing Systems (MuCoCoS 2010)

S. Isaza, F. Sánchez, G. N. Gaydadjiev, A. Ramirez, and M. Valero
Performance Evaluation of Macroblock-level Parallelization of H.264 Decoding on a cc-NUMA Multiprocessor Architecture

4CCC. 4th Colombian Computing Conference, Bucaramanga (Colombia)

M. Álvarez, A. Ramirez, M. Valero, A. Azevedo, C. Meenderinck, and B. Juurlink
FlexDCP: a QoS framework for CMP architectures

ACM Operating Systems Review, Special Issue on the Interaction among the OS, Compilers, and Multicore Processors

M. Moreto, F. Cazorla, A. Ramirez, R. Sakellariou, and M. Valero
BSC contributions in Energy-aware Resource Management for Large Scale Distributed Systems

1st Year Workshop of the COST Action IC0804 on Energy Efficiency in Large Scale Distributed Systems

J. Torres, E. Ayguade, D. Carrera, J. Guitart, V. Beltran, Y. Becerra, R. M. Badia, J. Labarta, and M. Valero

2009

Taking the heat off transactions: Dynamic selection of pessimistic concurrency control

Proceedings of the 2009 IEEE International Symposium on Parallel&Distributed Processing

N. Sonmez, T. Harris, A. Cristal, O. Unsal, and M. Valero
QuakeTM: parallelizing a complex sequential application using transactional memory

Proceedings of the 23rd international conference on Supercomputing

V. Gajinov, F. Zyulkyarov, O. Unsal, A. Cristal, E. Ayguade, T. Harris, and M. Valero
EazyHTM: eager-lazy hardware transactional memory

Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture

S. Tomić, C. Perfumo, C. Kulkarni, A. Armejach, A. Cristal, O. Unsal, T. Harris, and M. Valero

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