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2013

Loop Level Speculation in a Task Based Programming Model

IEEE Conference on High Performance Computing (HiPC 2013)

R. Gayatri, R. M. Badia, and E. Ayguade
The TERAFLUX Project: Exploiting the DataFlow Paradigm in Next Generation Teradevices

Euromicro Conference on Digital System Design, DSD 2013

M. Solinas, R. M. Badia, F. Bodin, A. Cohen, P. Evripidou, P. Faraboschi, N. Navarro, and M. Valero
Implicit-Storing and Redundant-Encoding-of-Attribute Information in Error-Correction-Codes

46th IEEE/ACM International Symposium on Microarchitecture (MICRO)

Y. Sazeides, E. Ozer, D. Kershaw, P. Nikolaou, M. Kleanthous, and J. Abella
Multi-Level Unified Caches for Probabilistically Time Analysable Real-Time Systems

IEEE Real-Time Systems Symposium (RTSS) 2013

L. Kosmidis, J. Abella, E. Quinones, and F. Cazorla
On-Chip Ring Network Designs for Hard-Real Time Systems

21st International Conference on Real-Time Networks and Systems

M. Panic, G. Rodríguez, E. Quinones, J. Abella, and F. Cazorla
parMERASA Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability

Euromicro Conference on Digital System Design, DSD 2013

T. Ungerer, C. Bradatsch, M. Gerdes, F. Kluge, R. Jahr, J. Mische, J. Fernandes, P. Zaykov, P. Zlatko, B. Boddeker, S. Kehr, H. Regler, A. Hugl, C. Rochange, H. Ozaktas, H. Casse, B. Armelle, P. Sainrat, N. Lay, I. Broster, D. George, M. Panic, E. Quinones, F. Cazorla, J. Abella, S. Uhrig, M. Rohde, and A. Pyka
Supporting Industrial Use of Probabilistic Timing Analysis with Explicit Argumentation

11th IEEE International Conference on Industrial Informatics (INDIN)

Z. Stephenson, J. Abella, and T. Vardanega
Measurement-Based Probabilistic Timing Analysis to Buffer Resources

13th International Workshop on Worst-Case Execution Time Analysis (WCET)

L. Kosmidis, T. Vardanega, E. Quinones, J. Abella, and F. Cazorla
DTM: Degraded Test Mode for Fault-Aware Probabilistic Timing Analysis

25th Euromicro Conference on Real-Time Systems (ECRTS13)

M. Slijepcevic, L. Kosmidis, J. Abella, E. Quinones, and F. Cazorla
APPLE: Adaptive Performance-Predictable Low-Energy Caches for Reliable Hybrid Voltage Operation

50th Annual Design Automation Conference (DAC)

B. Maric, J. Abella, and M. Valero

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