SORS: Vector Architecture for HPC and ML

Date: 03/Jul/2018 Time: 11:00


Sala d'actes FiB, Campus Nord (B6 Building)

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15th December 2022. 10:30 am. UPC's Vèrtex Building Auditorium + Gardens & Virtual

We are looking forward to celebrating the BSC staff annual meeting this year.

As in the previous edition, the event will be online and shorter.

The event will begin on December 15th at 10:30 am. We will send you a link nearer the time so you can connect.

Even more than normal, we hope that as many BSC staff as possible will be able to attend and participate.

You can participate by telling us:

What you would like to know about?

Let us know which subjects you find interesting to be incorporated into the BSC directors’ presentations.
Deadline exceeded

What would you like to listen to?

What you would like to share?

We would like to know more about your work, so we have booked one hour of the Annual Meeting to listen to 6 BSC employees that will explain what they do. We encourage you to be one of them.

What I would like to explain

Coming soon

 BSC Talks

We have booked time for 6 employees to explain in 6 minutes what you do at BSC.

The event will be VIRTUAL but the BSC Talks will be presented from the studio where the event is taking place.

We would like you to make short, attractive presentations (6 minutes) so all the BSC staff know what you do.

You could be one of those to go up the stage, and we will help you to prepare it.

What will you need to do?

  1. Let us know about what you would like to explain.
    • Send us a short video (landscape) of 45 seconds’ maximum explaining what you would like to present at
    • State your name, department, research group and a provisional title for your talk.
    • Deadline: November 29th.
  2. All the BSC staff will vote for the 6 most interesting proposals.
    • All videos will be available at the web page and the voting process will be open. Each employee will be able to vote up to 3 proposals.
  3. If your proposal is one of the chosen ones:
    • A training session will be organized for the 6 most voted.
  4. Prepare a 6 minutes’ presentation.
  5. The best presentation of December 15th will be awarded!

Directors’ presentation of 2022

We would like to know what subjects you are interested in so as to incorporate them in the directors’ presentation of the center. Fill in this form with your questions.


To download the talk's presentation here
Abstract: Vector computing is one of the historical ways to improve performance per watt, area and cost. The features of the instruction set architecture are fundamental to drive the capabilities of the compiler and programmer to enable vectorization of codes. Without vector code generation, vector execution units remain underutilized and irrelevant for performance. A vector architecture must therefore include features that enable vectorization of a larger set of codes and provide support for the market segments it is targeted to. Around this philosophy, Arm and its partners designed the Scalable Vector Extension (SVE) for the Arm architecture targeting high-performance computing and machine learning. The talk will cover SVE features that enhance vectorization and enable implementation for multiple markets, such as vector-length agnostic programming, speculative vectorization, gather-scatter support and non-temporal loads and stores. The talk will also cover microarchitectural aspects that must be considered when designing a vector architecture and the set of SVE-enabled tools available to explore that microarchitectural design space.

Short Bio: Alejandro Rico is a Staff Research Engineer in Arm Research working on processor architecture and microarchitecture for high-performance computing. His work at Arm focuses on scalability of parallel applications in large SoCs, and enablement, exploitation and performance analysis of vector processing using the Scalable Vector Extension. Before joining Arm, he worked in multi-core simulation methodologies and task-based parallel programs at the Barcelona Supercomputing Center. He holds a PhD from Universitat Politecnica de Catalunya and has co-authored over 20 scientific publications.



Alejandro Rico is a Staff Research Engineer in Arm Research working on processor architecture and microarchitecture for high-performance computing.