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2014

Evaluating Execution Time Predictability of Task-Based Programs

7th International Workshop on Multi-/Many-Core Computing Systems

T. Grass, A. Rico, M. Casas, M. Moreto, and A. Ramirez
Task Sampling: Computer Architecture Simulation in the Many-Core Era

Advanced Computer Architecture and Compilation for for High-Performance and Embedded Systems

T. Grass, A. Rico, M. Casas, M. Moreto, and A. Ramirez
Enabling Preemptive Multiprogramming on GPUs

41st International Symposium on Computer Architecture (ISCA)

I. Tanasic, I. Gelado, J. Cabezas, A. Ramirez, N. Navarro, and M. Valero

2013

Data placement in HPC architectures with heterogeneous off-chip memory

31nd IEEE International Conference on Computer Design (ICCD)

M. Pavlovic, N. Puzovic, and A. Ramirez
Data placement in HPC architectures with heterogeneous off-chip memory

31nd IEEE International Conference on Computer Design (ICCD)

M. Pavlovic, N. Puzovic, and A. Ramirez
Programmable and Scalable Reductions on Clusters

The 27th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2013)

J. Ciesko, J. Bueno-Hedo, N. Puzovic, A. Ramirez, R. M. Badia, and J. Labarta
Supercomputing with commodity CPUs: are mobile SoCs ready for HPC?

SC13: International Conference for High Performance Computing, Networking, Storage and Analysis

N. Rajovic, P. Carpenter, I. Gelado, N. Puzovic, A. Ramirez, and M. Valero
Data placement in HPC architectures with heterogeneous off-chip memory

31nd IEEE International Conference on Computer Design

M. Pavlovic, N. Puzovic, and A. Ramirez
Parallelizing general histogram application for CUDA architectures

2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII)

U. Milic, I. Gelado, N. Puzovic, A. Ramirez, and M. Tomasevic
Trace Filtering of Multithreaded Applications for CMP Memory Simulation

IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2013)

A. Rico, A. Ramirez, and M. Valero

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