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2005

Architectural Support for Real-Time Task Scheduling in SMT Processors

International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES-2005)

F. Cazorla, P. Knijnenburg, R. Sakellariou, E. Fernández, A. Ramirez, and M. Valero
Software Trace Cache

IEEE Transactions on Computers

A. Ramirez, J. Lluis Larriba-Pey, and M. Valero
Better branch prediction through prophet/critic hybrids

IEEE Micro

A. Falcón, J. Stark, A. Ramirez, K. Lai, and M. Valero

2004

Feasibility of QoS for SMT by Resource Allocation.

Lecture Notes in Computer Science (LNCS)

F. Cazorla, P. Knijnenburg, R. Sakellariou, E. Fernández, A. Ramirez, and M. Valero
Enabling SMT for Real-Time Embedded Systems.

European Signal Processing Conference (EUSIPCO)

F. Cazorla, P. Knijnenburg, R. Sakellariou, E. Fernández, A. Ramirez, and M. Valero
A Low-Complexity Fetch Architecture for High-Performance Superscalar Processors

ACM Transactions on Architecture and Code Optimization

O. J. Santana, A. Ramirez, J. Lluis Larriba-Pey, and M. Valero
Heterogeneity-Aware Architectures

XV Jornadas de Paralelismo

C. Acosta, A. Falcón, A. Ramirez, and M. Valero
Prophet/Critic Hybrid Branch Prediction

31st Annual International Symposium on Computer Architecture (ISCA-31)

A. Falcón, J. Stark, A. Ramirez, K. Lai, and M. Valero
Approaching a Smart Sharing of Resources in SMT Processors

Workshop on Complexity-Effective Design (WCED)

F. Cazorla, E. Fernández, A. Ramirez, and M. Valero
A Complexity-Effective Decoding Architecture Based on Instruction Streams

Workshop on Complexity-Effective Design (WCED)

O. J. Santana, A. Falcón, A. Ramirez, and M. Valero

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