Publicaciones

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2009

Parallel Scalability of Video Decoders

Journal of Signal Processing Systems

C. Meenderinck, A. Azevedo, B. Juurlink, M. Álvarez, and A. Ramirez

2008

A distributed processor state management architecture for large-window processors

41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41)

I. González, M. Galluzzi, A. Veidenbaum, A. Ramirez, A. Cristal, and M. Valero
Dynamic Cache Partitioning Based on the MLP on Cache Misses.

Transactions on HiPEAC

M. Moreto, F. Cazorla, A. Ramirez, and M. Valero
MFLUSH: Handling Long-latency loads in SMT On-Chip Multiprocessors.

International Conference on Parallel Processing (ICPP)

C. Acosta, F. Cazorla, A. Ramirez, and M. Valero
3D Die-Stacking Architectures: State of the Art

Advanced Computer Architecture and Compilation for Embedded Systems. ACACES 2008

A. Vega, A. Ramirez, and M. Valero
Parallelization Strategies for Smith Waterman Algorithm on CellBE

Advanced Computer Architecture and Compilation for Embedded Systems. ACACES 2008, Poster Session

F. Sánchez, A. Ramirez, and M. Valero
Scalability of Macroblock-level Parallelism for H.264 Decoding

Advanced Computer Architecture and Compilation for Embedded Systems. ACACES 2008, Poster

M. Álvarez, A. Ramirez, X. Martorell, E. Ayguade, and M. Valero
Multicore Resource Management

IEEE Micro

K. J. Nesbit, M. Moreto, F. Cazorla, A. Ramirez, M. Valero, and J. E. Smith
MLP-aware dynamic cache partitioning

2008 International Conference on High Performance Embedded Architectures & Compilers (HiPEAC 2008)

M. Moreto, F. Cazorla, A. Ramirez, and M. Valero
Task Management Analysis on the Cell BE

XIX Jornadas de Paralelismo, pp. 271-276, Castellón (Spain)

A. Rico, A. Ramirez, and M. Valero

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