Publications

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International Conferences
F. Cazorla, Knijnenburg, P., Sakellariou, R., Fernández, E., Ramirez, A., and Valero, M., Architectural Support for Real-Time Task Scheduling in SMT Processors, International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES-2005). 2005.
O. J. Santana, Falcón, A., Fernández, E., Medina, P., Ramirez, A., and Valero, M., A Comprehensive Analysis of Indirect Branch Prediction, 4th International Symposium on High Performance Computing (ISHPC-4). Springer-Verlag, Kansai Science City (Japan), pp. 133-141, 2002.
F. Cazorla, Fernández, E., Ramirez, A., and Valero, M., DCache Warn: An I-Fetch Policy To Increase SMT Efficiency, 18th International Parallel and Distributed Processing Symposium (IPDPS-2004). IEEE Computer Society Press, 2004.
F. Cazorla, Ramirez, A., Valero, M., and Fernández, E., Dynamically Controlled Resource Allocation in SMT Processors, 37th Annual International Symposium on Microarchitecture (MICRO-37). pp. 171-182, 2004.
J. Vera, Cazorla, F., Pajuelo, A., Santana, O. J., Fernández, E., and Valero, M., FAME: FAirly MEasuring Multithreaded Architectures. Brasov, Romania, 2007.
F. Cazorla, Knijnenburg, P., Sakellariou, R., Fernández, E., Ramirez, A., and Valero, M., Implicit vs. Explicit Resource Allocation in SMT Processors, 2004 Euromicro Symposium on Digital Systems Design (DSD 2004). Rennes, France, pp. 44-51, 2004.
F. Cazorla, Fernández, E., Ramirez, A., and Valero, M., Improving Memory Latency Aware Fetch Policies for SMT Processors, 5th International Symposium on High Performance Computing (ISHPC-V). Springer-Verlag, Tokyo, Japan, pp. 70-85, 2003.
F. Cazorla, Knijnenburg, P., Sakellariou, R., Fernández, E., Ramirez, A., and Valero, M., Predictable Performance in SMT Processors, Computing Frontiers (CF'04). 2004.
F. Cazorla, Knijnenburg, P., Sakellariou, R., Fernández, E., Ramirez, A., and Valero, M., On the Problem of Minimizing Workload Execution Time in SMT Processors, International Conference on Embedded Computer Systems: Architectures, Modelling, and Simulation (SAMOS VII). Samos, Greece, pp. 66-73, 2007.
F. Cazorla, Knijnenburg, P., Sakellarious, R., Fernández, E., Ramirez, A., and Valero, M., Quality of service for Simultaneous Multithreading Processors, ACACES 2005, Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems. pp. 67-70, 2005.
A. García, Santana, O. J., Fernández, E., Medina, P., Cristal, A., and Valero, M., Reducing the Activity of Instruction Renaming in Loop Structures, II Congreso Español de Informática (CEDI 2007). Zaragoza, Spain, 2007.
A. Falcón, Santana, O. J., Medina, P., Fernández, E., Ramirez, A., and Valero, M., Studying New Ways for Improving Adaptive History Length Branch Predictors, 4th International Symposium on High Performance Computing (ISHPC-4). Kansai Science City (Japan), pp. 271-279, 2002.
E. Fernández, Cazorla, F., Ramirez, A., Knijnenburg, P., Sakellariou, R., and Valero, M., Throughput versus Quality of Service in SMT processors, Euromicro-DSD (Digital System Design). Euromicro-DSD (Digital System Design), 2004.
A. García, Medina, P., Fernández, E., Santana, O. J., Cristal, A., and Valero, M., Towards the Loop Processor Architecture, XVI Jornadas de Paralelismo. Thomson, Granada, Spain, 2005.
Journal
E. Fernández, Torrents, D., Chillarón, J., Del Rio, M., Zorzano, A., and Palacín, M., Basolateral LAT-2 has a major role in the transepithelial flux of L-cystine in the renal proximal tubule cell line OK.. J Am Soc Nephrol., 2003.
D. Torrents, Estevez, R., Pineda, M., Fernández, E., Lloberas, J., Shi, Y. B., Zorzano, A., and Palacín, M., Identification and characterization of a membrane protein (y+L amino acid transporter-1) that associates with 4F2hc to encode the amino acid transport activity y+L. A candidate gene for lysinuric protein intolerance. J Biol Chem., 1998.
E. Fernández, Torrents, D., Zorzano, A., Palacín, M., and Chillarón, J., Identification and functional characterization of a novel low affinity aromatic-preferring amino acid transporter (arpAT). One of the few proteins silenced during primate evolution. J Biol Chem., 2005.
M. Pineda, Fernández, E., Torrents, D., Estevez, R., López, C., Camps, M., Lloberas, J., Zorzano, A., and Palacín, M., Identification of a membrane protein, LAT-2, that Co-expresses with 4F2 heavy chain, an L-type amino acid transport activity with broad specificity for small and large zwitterionic amino acids.. J Biol Chem., 1999.
L. Feliubadalo, Font, M., Purroy, J., Rousaud, F., Estivill, X., Nunes, V., Reig, N., Fernández, E., Estevez, R., Pineda, M., Torrents, D., Camps, M., Lloberas, J., Zorzano, A., and Palacín, M., Non-type I cystinuria caused by mutations in SLC7A9, encoding a subunit (bo,+AT) of rBAT.. Nat Genet., 1999.
F. Cazorla, Fernández, E., Ramirez, A., and Valero, M., Optimizing Long-Latency-Load-Aware Fetch Policies for SMT Processors, International Journal of High Performance Computing and Networking (IJHPCN), vol. 2, no. 2. 2004.
F. Cazorla, Knijnenburg, P., Sakellariou, R., Fernández, E., Ramirez, A., and Valero, M., Predictable Performance in SMT processors: Synergy Between the OS and SMTs, IEEE Transactions on Computers, vol. 55, no. 7. pp. 785-799, 2006.
F. Cazorla, Ramirez, A., Valero, M., Knijnenburg, P., Sakellariou, R., and Fernández, E., QoS for High-Performance SMT Processors in Embedded Systems, IEEE Micro, vol. 24. pp. 24-31, 2004.
Workshops
F. Cazorla, Fernández, E., Ramirez, A., and Valero, M., Approaching a Smart Sharing of Resources in SMT Processors, Workshop on Complexity-Effective Design (WCED). 2004.
J. Vera, Cazorla, F., Pajuelo, A., Santana, O. J., Fernández, E., and Valero, M., Measuring the Performance of Multithreaded Processors. In SPEC Benchmark Workshop (in conjunction with the Annual Meeting of the Standard Performance Evaluation Corporation (SPEC)), Austin, USA, 2007.
J. Vera, Cazorla, F., Pajuelo, A., Santana, O. J., Fernández, E., and Valero, M., A Novel Evaluation Methodology to Obtain Fair Measurements in Multithreaded Architectures. In Workshop on Modeling, Benchmarking and Simulation (MoBS)2006. Held in conjunction with ISCA, Boston, USA, 2006.