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Álvarez, L. et al. Hardware-software coherence protocol for the coexistence of caches and local memories. Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis 89:1–89:11 (2012). at <>
Alvarez, L. et al. Hardware-Software Coherence Protocol for the Coexistence of Caches and Local Memories. IEEE Transactions on Computers 99, 1 (2013).
Bosschere, K. D. et al. High Performance Embedded Architectures and Compilation Roadmap. (2007).
Cabezas, J., Araya-Polo, M., Gelado, I., Navarro, N. & Cela, J. M. High-Performance Reverse Time Migration on GPU. XXVIII International Conference of the Chilean Computer Society - XIII Workshop on Parallel and Distributed Systems (WSDP) (2009).
Gelado, I., Ramirez, A., Navarro, N. & Villavieja, C. Memory Management on Chip-MultiProcessors with on-chip Memories. Workshop on the Interaction between Operating Systems and Computer Architecture (WIOSCA'08) 1-7 (2008).