Publications

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Publications

D. Chasapis, Casas, M., Moreto, M., Schulz, M., Ayguade, E., Labarta, J., and Valero, M., Runtime-Guided Mitigation of Manufacturing Variability in Power-Constrained Multi-Socket NUMA Nodes, ICS '16 Proceedings of the 2016 International Conference on Supercomputing . Istanbul, Turkey, pp. 1-12, 2016.
T. Grass, Rico, A., Casas, M., Moreto, M., and Ayguade, E., TaskPoint: Sampled simulation of task-based programs, Performance Analysis of Systems and Software (ISPASS), 2016 IEEE International Symposium on. Uppsala, Sweden, pp. 296–306, 2016.
Q. Liu, Moreto, M., Abella, J., Cazorla, F., and Valero, M., DReAM: An Approach to Estimate per-Task DRAM Energy in Multicore Systems, ACM Transactions on Design Automation of Electronic Systems, vol. 22. pp. 1 - 26, 2016.
M. Casas and Bronevetsky, G., Evaluation of HPC Applications’ Memory Resource Consumption via Active Measurement, IEEE Transactions on Parallel & Distributed Systems, vol. 27. IEEE Computer Society, Los Alamitos, CA, USA, pp. 2560-2573, 2016.
Q. Liu, Moreto, M., Abella, J., Cazorla, F., Jiménez, D. A., and Valero, M., Sensible Energy Accounting with Abstract Metering for Multicore Systems, ACM Transactions on Architecture and Code Optimization (TACO), vol. 12, no. 11th International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC). 2016.
L. Alvarez, Vilanova, L., Moreto, M., Casas, M., González, M., Martorell, X., Navarro, N., Ayguade, E., and Valero, M., Coherence Protocol for Transparent Management of Scratchpad Memories in Shared Memory Manycore Architectures, Proceedings of the 42nd International Symposium on Computer Architecture (ISCA). ACM, Portland, Oregon, pp. 720-732, 2015.
P. Fuentes, Vallejo, E., Garcia, M., Rodríguez, G., Minkenberg, C., and Valero, M., Contention-based Nonminimal Adaptive Routing in High-radix Networks, 29th IEEE International Parallel & Distributed Processing Symposium. pp. 103-112, 2015.
L. Jaulmes, Casas, M., Moreto, M., Ayguade, E., Labarta, J., and Valero, M., Exploiting Asynchrony from Exact Forward Recovery for DUE in Iterative Solvers, SC'15 - Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis. ACM, Austin, Texas, pp. 53:1–53:12, 2015.
V. J. Jiménez, Buyuktosunoglu, A., Bose, P., O’Connell, F., Cazorla, F., and Valero, M., Increasing Multicore System Efficiency through Intelligent Bandwidth Shifting, International Symposium on High- Performance Computer Architecture (HPCA). pp. 39-50, 2015.
M. Casas, Moreto, M., Alvarez, L., Castillo, E., Chasapis, D., Hayes, T., Jaulmes, L., Palomar, O., Unsal, O., Cristal, A., Ayguade, E., Labarta, J., and Valero, M., Runtime-Aware Architectures, Euro-Par 2015: Parallel Processing, vol. 9233, no. Lecture Notes in Computer Science. pp. 16-27, 2015.
L. Alvarez, Moreto, M., Casas, M., Castillo, E., Martorell, X., Labarta, J., Ayguade, E., and Valero, M., Runtime-Guided Management of Scratchpad Memories in Multicore Architectures, 2015 International Conference on Parallel Architecture and Compilation (PACT) . pp. 379-391, 2015.
P. Fuentes, Vallejo, E., Camarero, C., Beivide, R., and Valero, M., Throughput Unfairness in Dragonfly Networks under Realistic Traffic Patterns, 2015 IEEE International Conference on Cluster Computing . pp. 801-808, 2015.
T. Hayes, Palomar, O., Unsal, O., Cristal, A., and Valero, M., VSR sort: A novel vectorised sorting algorithm & architecture extensions for future microprocessors, 2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA) . IEEE, Burlingame, CA, USA, pp. 26-38, 2015.
D. Prat, Ortega, C., Casas, M., Moreto, M., and Valero, M., Adaptive and application dependent runtime guided hardware prefetcher reconfiguration on the IBM POWER7, 6th International Workshop on Adaptive Self-tuning Computing Systems. arXiv.org, Amsterdam, Netherlands, pp. 1–6, 2015.
R. Vidal, Casas, M., Moreto, M., Chasapis, D., Ferrer, R., Martorell, X., Ayguade, E., Labarta, J., and Valero, M., Evaluating the Impact of OpenMP 4.0 Extensions on Relevant Parallel Workloads, International Workshop on OpenMP (IWOMP) , no. Lecture Notes in Computer Science. LNCS, pp. 60-72, 2015.
V. Gajinov, Eric, I., Stojanovic, S., Milutinovic, V., Unsal, O., Ayguade, E., and Cristal, A., A Case Study of Hybrid Dataflow and Shared-memory Programming Models: Dependency-based Parallel Game Engine, 26th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2014. Pierre Sens, Philippe O. A. Navaux, Paris, France, pp. 1–8, 2014.

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