SORS: Team strategy for hardware development (Part II)

Date: 23/Jan/2020 Time: 16:00 - 18:00


Sala d'actes de la FiB (Auditorium FiB, B6 Building, Campus Nord)

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The goal of this second part will be to examine some insights into what was not covered in the first talk and discuss what the visitors learned after being at BSC for the week.

Abstract: Five founding members of the former Samsung Austin Research Center (SARC) will share their thoughts on how to build a high performance team, how industry is different from the academic experience, how things are different at this point in their careers versus when they got started. They will share how they achieved international successes and what is takes to deliver a real project. This team delivered the processor that went into Samsung smart phones, M1, M2, M3, M4, and M5.

Short bios:
Keith Hawkins: Engineering Executive (Retired SVP)
Engineering executive with extensive experience in chip development ranging from building high performance teams to leading/managing complex design programs through the entire development cycle.
Product content spans from ARM and X86 custom microprocessors/coherent fabric, SOCs, embedded processors, PC chipsets, and communications devices.
Rajesh Kashyap: Engineering Executive, infrastructure and physical design (former VP)
Engineering executive with 20 years of experience in successfully building and leading diverse engineering teams of 400+ engineers in semiconductor companies. Recently Vice President of Custom CPU
development at Samsung Austin Research Center. Prior to that worked on custom core for HPC segment at Intel. Strong leader with experience in various disciples of design.
Jerry Zuraski: Leader in architecture, microarchitecture and RTL
Gerald Zuraski is a lead architect with 28 years of experience in chip development ranging from building high performance teams to guiding complex design programs through the entire development cycle at Samsung, Oracle, Sun, Intel and AMD. Successful products include ARM, SPARC and x86 custom microprocessors and SoCs.
Brad Perry: Leader in verification and validation
Microprocessor verification leader with 30 years of experience in the field from Samsung and AMD. Successful in building, leading and managing several cross-functional, international, diverse teams ranging from 10-100+ engineers. Experience and knowledge with a wide variety of verification methodologies and tools with a focus on quality and optimizing efficiency given resource and project constraints.
Dean Marvin: Leader in CAD and power
Dean most recently was a Principal Engineer at Samsung Austin R&D Center focused on low power tools  and methodology. He has been involved with a number of EDA startups and was the Director of
CAD and IT during the development of Athlon and Opteron processors at AMD. He has contributed at all levels of design at some point in his career, from architectural modeling to layout.


Keith Hawkins (Engineering Executive -Retired SVP-), Rajesh Kashyap: Engineering Executive (infrastructure and physical design -former VP-), Jerry Zuraski (Leader in architecture, microarchitecture and RTL), Brad Perry (Leader in verification and validation), Dean Marvin (Leader in CAD and power).