Publications

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Showing 71 - 80 results of 87

2015

A framework for evaluating comprehensive fault resilience mechanisms in numerical programs

Journal of Supercomputing

S. Chen, G. Bronevetsky, B. Li, M. Casas, and L. Peng
Adaptive and application dependent runtime guided hardware prefetcher reconfiguration on the IBM POWER7

6th International Workshop on Adaptive Self-tuning Computing Systems

D. Prat, C. Ortega, M. Casas, M. Moreto, and M. Valero

2014

High level queuing architecture model for high-end processors

D. Roca, M. Nemirovsky, M. Moreto, and M. Casas
Evaluating Execution Time Predictability of Task-Based Programs

7th International Workshop on Multi-/Many-Core Computing Systems

T. Grass, A. Rico, M. Casas, M. Moreto, and A. Ramirez
Task Sampling: Computer Architecture Simulation in the Many-Core Era

Advanced Computer Architecture and Compilation for for High-Performance and Embedded Systems

T. Grass, A. Rico, M. Casas, M. Moreto, and A. Ramirez
Runtime-Aware Architectures: A First Approach

International Journal on Supercomputing Frontiers and Innovations

M. Valero, M. Moreto, M. Casas, E. Ayguade, and J. Labarta
Active Measurement of the Impact of Network Switch Utilization on Application Performance

28th IEEE International Parallel & Distributed Processing Symposium (IPDPS)

M. Casas, and G. Bronevetsky
Active Measurement of Memory Resource Consumption

28th IEEE International Parallel & Distributed Processing Symposium (IPDPS)

M. Casas, and G. Bronevetsky

2013

Performance Analysis Techniques for the Exascale Co-Design Process

Proceedings of International Conference on Parallel Computing (PARCO)

M. Schulz, A. Bhatele, J. Belak, P. - T. Bremer, M. Casas, G. Bronevetsky, T. Gamblin, K. Isaacs, I. Laguna, J. Levine, V. Pascucci, D. Richards, and B. Rountree

2011

Extracting the optimal sampling frequency of applications using spectral analysis

Concurrency and Computation: Practice and Experience

M. Casas, H. Servat, R. M. Badia, and J. Labarta

Pages