Publications

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2017

Reducing Cache Coherence Traffic with a NUMA-Aware Runtime Approach

IEEE Transactions on Parallel and Distributed Systems

P. Caheny, L. Alvarez, S. Derradji, M. Valero, M. Moreto, and M. Casas
Prediction of the impact of network switch utilization on application performance via active measurement

Parallel Computing

M. Casas, and G. Bronevetsky
Runtime-Assisted Shared Cache Insertion Policies Based on Re-reference Intervals

Lecture Notes in Computer ScienceEuro-Par 2017: Parallel Processing

V. Dimić, M. Moreto, M. Casas, and M. Valero
ATM: Approximate Task Memoization in the Runtime System

2017 IEEE International Parallel and Distributed Processing Symposium (IPDPS)

I. Brumar, M. Casas, M. Moreto, M. Valero, and G. S. Sohi
Iteration-Fusing Conjugate Gradient

Proceedings of the 31st ACM International Conference on Supercomputing (ICS)

S. Zhuang, and M. Casas
libPRISM: An Intelligent Adaption of Prefetch and SMT Levels

Proceedings of the 31st ACM International Conference on Supercomputing (ICS)

C. Ortega, M. Moreto, M. Casas, R. Bertran, A. Buyuktosunoglu, A. E. Eichenberger, and P. Bose

2016

PARSECSs: Evaluating the Impact of Task Parallelism in the PARSEC Benchmark Suite

ACM Transactions on Architecture and Code Optimization

D. Chasapis, M. Casas, M. Moreto, R. Vidal, E. Ayguade, J. Labarta, and M. Valero
Task Scheduling Techniques for Asymmetric Multi-core Systems

IEEE Transactions on Parallel and Distributed Systems

K. Chronaki, A. Rico, M. Casas, M. Moreto, R. M. Badia, E. Ayguade, J. Labarta, and M. Valero
Evaluation of HPC Applications’ Memory Resource Consumption via Active Measurement

IEEE Transactions on Parallel & Distributed Systems

M. Casas, and G. Bronevetsky
MUSA: A Multi-level Simulation Approach for Next-generation HPC Machines

Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis

T. Grass, C. Allande, A. Armejach, A. Rico, E. Ayguade, J. Labarta, M. Valero, M. Casas, and M. Moreto

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