Publications

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2022

A Generator of Numerically-Tailored and High-Throughput Accelerators for Batched GEMMs

2022 IEEE 30th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)

L. Ledoux, and M. Casas

2021

Morrigan: A composite instruction TLB prefetcher

54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

G. Vavouliotis, L. Álvarez, B. Grot, D. Jiménez, and M. Casas
Compiler-Assisted Compaction/Restoration of SIMD Instructions

IEEE Transactions on Parallel and Distributed Systems

J. M. Cebrián, T. Balem, A. Barredo, M. Casas, M. Moreto, A. Ros, and A. Jimborean
Exploiting Page Table Locality for Agile TLB Prefetching

2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA)

G. Vavouliotis, L. Álvarez, V. Karakostas, K. Nikas, N. Koziris, D. A. Jiménez, and M. Casas
Efficiently running SpMV on long vector architectures

Proceedings of the 26th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP)

C. Gomez, F. Mantovani, E. Focht, and M. Casas
Intelligent Adaptation of Hardware Knobs for Improving Performance and Power Consumption

IEEE Transactions on Computers

C. Ortega, L. Álvarez, M. Casas, R. Bertran, A. Buyuktosunoglu, A. E. Eichenberger, P. Bose, and M. Moreto
Cache-aware Sparse Patterns for the Factorized Sparse Approximate Inverse Preconditioner

Proceedings of the 30th International Symposium on High-Performance Parallel and Distributed Computing (HPDC ’21)

S. Laut, R. Borrell, and M. Casas

2020

Cost-Aware Prediction of Uncorrected DRAM Errors in the Field

International Conference for High Performance Computing, Networking, Storage, and Analysis (SC)

I. Boixaderas, J. Bartolome, P. Carpenter, D. Zivanovic, D. Vicente, P. Radojkovic, S. More, M. Casas, and E. Ayguadé
Cost-Aware Prediction of Uncorrected DRAM Errors in the Field

Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC)

I. Boixaderas, D. Zivanovic, S. More, J. Bartolome, D. Vicente, M. Casas, P. M. Carpenter, P. Radojkovic, and E. Ayguadé
Semi-automatic validation of cycle-accurate simulation infrastructures: The case for gem5-x86

Future Generation Computer Systems

J. M.Cebrian, A. Barredo, H. Caminal, M. Moreto, M. Casas, and M. Valero

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