OmpSs@FPGA on track to become embedded systems programming standard, thanks to BSC’s work in the AXIOM project

03 July 2018

Researchers at Barcelona Supercomputing Center (BSC) and the Universitat Politècnica de Catalunya-Barcelona Tech (UPC) have developed a flexible, efficient, simple programming model for embedded systems.

OmpsSs@FPGA adapts OmpSs – the BSC technology which allows programs to be executed on multiple processors at once – to field-programming gate arrays (FPGAs), processors which are gaining increasing popularity for applications such as in the Internet of Things (IoT).

During the AXIOM project, which was funded by the European Union (EU) and finished in March, a team of BSC-UPC researchers made OmpSs@FPGA operational for embedded devices. The programming model is now being used in other EU-funded projects, including EuroEXA and LEGaTO.

“During the AXIOM project, we laid the foundations for making OmpSs@FPGA the programming standard for symmetric multiprocessing (SMP) and FPGA embedded systems,” explains Carlos Álvarez, a researcher in the BSC Computer Science department.

“With OmpSs@FPGA, BSC is leading the way in embedded systems programming,” adds Xavier Martorell, leader of the parallel programming models group at BSC. “The research undertaken during the AXIOM project is now being built upon in other projects, such EuroEXA, a major EU-funded project with a budget of €20 million which is working towards exascale supercomputers for Europe.”

Unlike other technologies, OmpSs@FPGA allows programmers to exploit multiple processors and accelerators at once, leading to greater efficiency. Thanks to its relatively simple programming interface, the time taken to program FPGA systems – which can be notoriously difficult to program – can be reduced from six months to as little as a week.

OmpSs@FPGA has already been put to the test in industrial settings, by automotive parts manufacturer Aingura IIoT, part of the Etxe-Tar group of manufacturing companies. As part of an agreement with Ikergune, the research and development wing of Etxe-Tar, BSC-UPC researchers developed OmpSs@FPGA for Aingura’s industrial applications. Using OmpSs@FPGA allows the computation to be parallelised among all the free resources of the system, allowing Aingura to introduce artificial intelligence algorithms into the sensors while keeping costs down. In 2017, Carlos Álvarez accepted a HiPEAC Technology Transfer Award on behalf of the team for this work.

The work undertaken during AXIOM was crucial to the evolution of OmpSs@FPGA. Launched in February 2015, the project aimed to deliver new software/hardware architectures for smart cyber-physical systems. Bringing together academic and industrial partners from across Europe, the project fulfilled all of its objectives, including the production of the first board combining Arduino, Arm and FPGA. Nacho Navarro, associate professor at UPC and leader of the group on accelerators for HPC at BSC, who passed away in February 2016, played a pivotal role in the project at BSC.

“Nacho was fundamental to setting up the AXIOM project and ensuring its smooth running at BSC,” comments Carlos. “Two years after his death, his warmth, generosity and technical expertise are still sadly missed, as they will be in years to come.”

AXIOM deliverables