New Processor Emulation Platform at BSC will explore hardware/software co-designs for exascale supercomputers based on European IP

12 March 2020

BSC will coordinate the MEEP RIA project, with UNIZG-FER and TÜBİTAK BILGEM as partners.

The aim of the Research and Innovation Action (RIA) consists of activities aiming to establish new knowledge and/or to explore the feasibility of a new or improved processor technology and related for HPC and embedded computing

The consortium, led by the Barcelona Supercomputing Center (BSC), was granted funding from the European Programme Research and Innovation Action (RIA) to execute the MEEP project, whose resulting technologies aim to create European chips from the further development of follow-on project(s).

The MareNostrum Experimental Exascale Platform (MEEP) project supports the goal of the European Union (EU) program EuroHPC to create competitive European technology integrated into future exascale supercomputers. Specifically, it aims to develop an exploratory supercomputing infrastructure for the development, integration, testing and co-design of a wide range of European technologies, which could form part of future European exascale systems, based on European-developed intellectual property (IP). The ultimate goal is to create an open full-stack (software and hardware) ecosystem that could form the foundation for many other European systems, both in HPC and embedded computing, with benefits for numerous stakeholders within academia and industry.

In order to reach its goals, MEEP brings together three EU partners: BSC (Spain), as coordinator will provide software and hardware as well as expertise to create infrastructure for European chip developing targeting exascale machines, UNIZG-FER (Croatia) will contribute with its significant expertise in architecture and building and deploying FPGA-based systems and TÜBİTAK BILGEM (Turkey) will contribute their deep expertise in verification, architecture and advanced logic design.

According to Peter Hsu, MEEP director at BSC “it is important for us to be the coordinators of such highly competitive technology that will build, create and deploy key technologies of BSC that can reach the market and directly contribute to the evolution of society.” John Davis, MEEP coordinator at BSC, adds “The MareNostrum Experimental Exascale Platform (MEEP), as a performance evaluation at BSC and software development vehicle for future chip designs, will provide European technology that will set a foundation for many systems, both in HPC and beyond.”

The Research and Innovation Action (RIA) programme is part of the European High-Performance Computing Joint Undertaking (EuroHPC JU), which is a public-private partnership in High Performance Computing (HPC), enabling the pooling of European Union (EU) -level resources with the resources of participating EU Member States and participating associated states of the Horizon 2020 programme, as well as private stakeholders. The Joint Undertaking has the twin stated aims of developing a Pan-European supercomputing infrastructure, and supporting research and innovation activities.

The programme develops activities that aim to establish new knowledge and/or to explore the feasibility of a new or improved processor technology, and related products, processes, services and/or solutions for high-performance computing (HPC) and embedded computing. For this purpose, they may include basic and applied research, technology development and integration, testing and validation on a small-scale prototype in a laboratory or simulated environment.


   This project has received funding from the European High-Performance Computing Joint Undertaking Joint Undertaking (JU) under grant agreement No 946002. The JU receives support from the European Union’s Horizon 2020 research and innovation programme and Spain, Croatia, Turkey.