BSC develops four open-source hardware components based on RISC-V, contributing to open, reliable and high-performance safety-critical systems for industry

22 December 2022

Greater performance demands of safety-critical, real-time systems due to increasing automation, autonomy and demand for real-time response requires hardware and software components that can integrate the complexity required while adhering to stringent safety verification processes. Given that failure or malfunction in safety-critical systems may result in severe harm in the form of casualties or economic losses, the question of safety is of critical importance. Within the context of the European-funded SELENE project, BSC researchers have risen to this challenge by developing four safety-related components that improve observability and control channels to provide flexible solutions and by assessing them in industrial use cases.

BSC expertise has led to the development of the open-source modules SafeSU, SafeDE, SafeDM, SafeTI that support verification and validation (V&V) processes and safety measure deployment to guarantee that the project’s safety goals are met. They have already been integrated with Advanced Microcontroller Bus Architecture (AMBA) protocols such as AMBA Advanced High-performance Bus (AHB) and AMBA Advanced eXtensible Interface 4 (AXI4). These components have been tested in the project’s four use cases: an autonomous robot from Virtual Vehicles, an autonomous train from CAF Signalling, and two space use-cases covering satellites and deep space stations from Airbus Defence and Space, France and Germany, each of which has its own software and hardware guidelines and regulations. These components are also being transferred to Collins Aerospace (Ireland) for use in industry and are being used to create more opportunities for European projects and industry and to share knowledge with RISC-V interested groups.

The BSC- developed components are publicly available with their supporting publications via the BSC-hosted Github repository.

Jaume Abella, BSC Principal Investigator for the SELENE project and co-Manager of the Computer Architecture OS Interface CAOS Group, explains that, ‘BSC SafeX technologies developed in SELENE are the basis for enabling a safety-relevant SoC [System on Chip] that becomes a safety island, providing observability and controllability features to HPC SoCs lacking them’.

Next steps for BSC researchers include developing this safety island concept. Support for this concept is currently being gathered from key industrial partners.


SELENE (Self-monitored Dependable platform for High-Performance Safety-Critical Systems) is a European funded project with a budget of €4,9 million which started on 1 December 2019 and ended on 30 November 2022. The project is coordinated by Universitat Politècnica de València (UPV) and brings together a multidisciplinary 11-partner consortium. This project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement no. 871467.

Main figure: BSC-developed hardware modules on SELENE´s "system-on-chip" appear in yellow.