10. Thesis

  • Milan Stanic. “Design of Energy-Efficient Vector Units for In-Order Cores”Outstanding “Cum Laude”
    Technical University of Catalonia. January, 2017
  • Ivan Ratkovic. “On the Design of Power and Energy-Efficient Functional Units for Vector Processors”Outstanding “Cum Laude”
    Technical University of Catalonia. December, 2016
  • Víctor Jiménez. “Improving the Efficiency of Multicore Systems Through Software and Hardware Cooperation.“ Outstanding “Cum Laude”
    Technical University of Catalonia. September, 2016
  • Timothy Hayes. “Novel Vector Architectures for Data Management”. Outstanding “Cum Laude”. Technical University of Catalonia. July, 2016
  • Milovan Duric. “Specialization and Reconfiguration of Lightweight Processors for data-Parallel Applications”. Outstanding “Cum Laude”. Technical University of Catalonia. February 2016
  • Qixiao Liu. “Per-task Energy Metering and Accounting in the Multicore Area”. Outstanding "Cum Laude".
    Technical University of Catalonia. May, 2016.
  • Leonidas Kosmidis. “Enabling Caches in Probabilistic Timing Analysis”. To be presented in 2017.
  • Vesna Novack. “Extending the Applicability of Deterministic Multithreading”. Outstanding “Cum Laude”. Technical University of Catalonia. January, 2016
  • Nikola Markovic. “Hardware Thread Scheduling Algorithms for Single-ISA Asymmetric CMPs”. Outstanding “Cum Laude”. Technical University of Catalonia. December 2015
  • José Carlos Ruiz Luque. “CPU Accounting in Multi-Threaded Processors”. Outstanding “Cum Laude”. Technical University of Catalonia. May 2014
  • Bojan Maric. “Cache Designs for Reliable Hybrid High and Ultra-Low Voltage Operation”. Outstanding “Cum Laude”. Technical University of Catalonia. May 2014
  • Srdjan Stipic. “Techniques for Improving the Performance of Software Transactional Memory”. Technical University of Catalonia. July 2014
  • Alessandro Morari.. “Scalable System Software for High Performance Large-Scale Applications”. Technical University of Catalonia. 2013
  • Alejandro Rico. “Raising the Level of Abstraction: Simulation of Large Chip Multiprocessors Running Multithreaded Applications”. Outstanding “Cum Laude”. Technical University of Catalonia. October, 2013
  • Augusto Vega. “Performance and Power Optimizations in Chip Multiprocessors for Throughput-Aware Computation”. Pass “Cum Laude”. Technical University of Catalonia. July, 2013.
  • Vladimir Subotic. “Evaluating Techniques for Parallelization Tunig in MPI, OmpSs and MPI/OmpSs”. Pass “Cum Laude”. Technical University of Catalonia. July, 2013.
  • Isidro González. “The Multi-sates Processors”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. October, 2012.
  • Marco Paolieri. “A Multi-core Processor for Hard Real-Time Systems”. Pass “Cum Laude”Technical University of Catalonia, Computer Architecture department. November, 2011
  • Felipe Cabarcas Jaramillo. “Castell: A Heterogeneous CMP Architecture Scalable to Hundreds of Processors”. Pass “Cum Laude”Technical University of Catalonia, Computer Architecture department. September, 2011
  • Mauricio Alvarez Mesa. “Parallel Video Decoding”. Pass “Cum Laude”Technical University of Catalonia, Computer Architecture department. September, 2011.
  • Ferad Zyulkyarov. “Programming, debugging, Profiling and Optimizing Transactional Memory Programs”. Pass “Cum Laude”Technical University of Catalonia, Computer Architecture department. July, 2011.
  • Friman Sánchez Castaño. “Exploiting Multiple Levels of Parallelism in Bioinformatics Applications. Pass “Cum Laude”.
    Technical University of Catalonia, Computer Architecture department. April, 2011.
  • Tanausú Ramírez García: “Runahead Threads”. Pass “Cum Laude”.
    Technical University of Catalonia, Computer Architecture department.April, 2010. 
  • Miquel Moretó Planas. “Improving Cache Behavior in CMP Architectures through Cache Partitioning Techniques”. Pass “Cum Laude”Technical University of Catalonia, Computer Architecture department. December, 2009.
  • Jesús Alastruey Benedé. “Renombre de Registros Especulativo”. Unanimously "Cum Laude".
    Zaragoza University. December, 2009.
  • Ruben González. “Content-Aware Architectures”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. December, 2009.
  • Carlos Boneti. “Exploring Coordinated Software and Hardware Support for Hardware Resource Allocation”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. September, 2009.
  • Carmelo Acosta. “Heterogeneity-Awareness in Multithreaded Multicore Processors”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. July, 2009.
  • Miquel Pericás. “Affordable Kilo-Instruction Processors”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. December, 2008
  • Xavier Verdú. “Analysis and Architectural Supprot for Stateful Packet Processing”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. July, 2008.
  • Marco Ramírez. “Low-Power Instruntion Queue for Out-of-Order Processors”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. July 2007.
  • Esther Salami. “Optimizing VLIW Architectures for Multimedia Applications”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. June, 2007.
  • Carlos Alvarez. “Diffused Computing”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. May, 2007.
  • Adrián Cristal. “Kilo-Instruction Processors”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. April, 2006.
  • Manuel Alejandro Pajuelo González. “Speculative Vectorization for the Superscalars Processors”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. November, 2005.
  • Francisco Javier Cazorla Almeida. “Quality of Service for Simultaneous Multithreaded Processors”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. October, 2005.
  • Oliver Santana. “Advanced Stream Prediction”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. May, 2005
  • Ayose Falcón. “Fetch Improvement Mechanisms for Next-Generation Processors”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. February, 2005.
  • Daniel Ortega. “Dynamic Instruction Bypassing”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. July, 2003.
  • Teresa Monreal. “Hardware techniques to optimize the Usage of the records in Superscalars Processors”. Pass “Cum Laude”, Zaragoza University. June 2003.
  • Jesús Corbal San Adrián “N-Dimensional Vector Instruction Set Architectures for Multimedia Applications”. Pass "Cum Laude".
    Technical University of Catalonia, Computer Architecture department, July 2002. 
  • Alex Ramírez Bellido “High Performance Instruction Fetch Using Software and Hardware Co-Design”. Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department, July, 2002.UPC Award to the best Computer Thesis of 2001-2002 promotion.
  • Francisca Quintana Rodríguez, “Vector Accelerators for the Superscalars Processors”. Pass "Cum Laude"
    Las Palmas de Gran Canaria University, Computer and Systems Department, December, 2001.
  • Luis Alfonso Villa Vargas, “ Evalutaion of the advanced Vector Architectures with short Records”, Pass "Cum Laude"
    Universitat Politècnica de Catalunya, Departament d´Arquitectura de Computadors, 1999.
  • David López Álvarez, “Large resources: a low priced technique to make use of the aggressive parallelism in numerical codes and VLIW Architectures", Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department. 1998.
  • Roger Espasa Sans, “Advanced Vector Architectures”, Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department, 1997.
    UPC Award to the best Computer thesis of 1996-97 promotion.
  • Josep Llosa Espuny, “Reducing the Impact of Register Pressure on Software Pipelining”, Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department, 1996.
    UPC Award to the best Computer thesis of 1995-96 promotion.
  • Montse Peiron Guardia, “Optimization of the Memory Systems in Vector Multiprocessors's performance", Pass "Cum Laude"
    Technical University of Catalonia, Computer Architecture department, 1996.
  • Fernando Núñez Mendoza, “On Mapping Selected Graphs Problems onto VLSI Array Processors”, Pass "Cum Laude"
    Technical University of Catalonia, Computer Factuly in Barcelona, 1988.
  • Jesús Labarta Mancho, “Interferences reduction in Multiprocessors systems”, Pass "Cum Laude"
    Technical University of Catalonia, E.T.S.I. Telecommunications of Barcelona, 1983.
  • José Mª. Llabería Griñó, “Study of the Interconnection's network with the adaptive Multiplexing for the Multiprocessors' systems”, Pass "Cum Laude"
    Technical University of Catalonia, E.T.S.I. Telecommunications of Barcelona, 1983.
  • Enrique Herrada Lillo, “Contribution to the Design and the Evaluation of the interconnection's network for the Multiprocessors” Pass "Cum Laude"
    Technical University of Catalonia, E.T.S.I. Telecommunications of Barcelona, 1983.