Exascale Supercomputers Design Verification Engineers (RE1-2-3)

Job Reference



Exascale Supercomputers Design Verification Engineers (RE1-2-3)

Closing Date

Sunday, 31 July, 2022
Reference: 260_19_CS_GCS_RE123
Job title: Exascale Supercomputers Design Verification Engineers (RE1-2-3)


About BSC
The Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses MareNostrum, one of the most powerful supercomputers in Europe, and is a hosting member of the PRACE European distributed supercomputing infrastructure. The mission of BSC is to research, develop and manage information technologies in order to facilitate scientific progress. BSC combines HPC service provision and R&D into both computer and computational science (life, earth and engineering sciences) under one roof, and currently has over 770 staff from 55 countries.

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Context And Mission
BSC is looking for 4 talented and motivated professionals with expertise in RTL Design Verification targeting ASICs and FPGAs for a European HPC accelerator. The design is based on RISC-V architecture. This is a NEW project to build an FPGA-based emulator for an energy-efficient Exascale system. We are looking for candidates with strong verification and debugging skills, able to work with design engineers to deliver functionally correct design blocks.
Key Duties
  • Verify complex digital designs.
  • Collaborate closely with design and verification engineers in active projects
  • Perform hands-on verification.
  • Build efficient and effective verification environments that exercise IP designs.
  • Responsible for the full life cycle of verification, from verification planning to test execution, to collecting and closing coverage.
  • Education
    • Ph.D. in Electrical Engineering or Engineering degree or equivalent level of professional experience.
  • Essential Knowledge and Professional Experience
    • Experienced with the full verification life cycle from test planning to signoff.
    • Knowledge of and experience with industry-standard simulators (Model/QuestaSim, VCS, etc.), revision control systems and regression systems.
    • Experienced in all latest DV methodologies, assertions, Functional Specification, System Verilog and UVM, Assembly/C-based Verification. Low power Verification using UPF/CPF is a plus.
    • Strong programming in SystemVerilog, UVM and debugging skills.
    • Experienced in developing a DV plan based on Functional Specification, create and build the necessary verification test bench/infrastructure, develop tests and verify design.
    • Experience with top-level and processor-based SOC and Data Level Parallelism (GPU/SIMD/Vector) verification.
    • Strong scripting experience using scripting languages like Python, Perl, or Tcl.
    • Identify and write all types of coverage measures for stimulus and corner-cases, including coverage measures to identify verification holes and to show progress towards tape-out.
    • Agile development and open source development, deployment, and support, including GitHub or equivalent.
    • Fluency in English is essential, Spanish is welcome.
  • Competences
    • Effective communicator, inter-personal skill, and work well on collaborative designs.
    • Keeps abreast of technology trends.
    • Ability to think creatively.
    • Ability to work independently and make decisions.
    • Ability to take initiative, prioritize and work under set deadlines and pressure.
  • The position will be located at BSC within the Computer Sciences Department
  • We offer a full-time contract, a good working environment, a highly stimulating environment with state-of-the-art infrastructure, flexible working hours, extensive training plan, tickets restaurant, private health insurance, fully support to the relocation procedures
  • Duration: Temporary - Until 31/12/2022
  • Salary: we offer a competitive salary commensurate with the qualifications and experience of the candidate and according to the cost of living in Barcelona
  • Starting date: asap
Applications procedure and process

All applications must include:

  • A Cover Letter with a statement of interest in English, including two contacts for further references - Applications without this document will not be considered
  • A full CV in English including contact details
The vacancy will remain open until suitable candidate has been hired. Applications will be regularly reviewed and potential candidates will be contacted.
OTM-R principles for selection processes
BSC-CNS is committed to the principles of the Code of Conduct for the Recruitment of Researchers of the European Commission and the Open, Transparent and Merit-based Recruitment principles (OTM-R). This is applied for any potential candidate in all our processes, for example by creating gender-balanced recruitment planels and recognizing career breaks etc.
BSC-CNS is an equal opportunity employer committed to diversity and inclusion. We are pleased to consider all qualified applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or any other basis protected by applicable state or local law.
For more information follow this link


Application Form

please choose one of this and if needed describe the option : - BSC Website - Euraxess - HiPeac - LinkedIn - Networking/Referral: include who and how - Events (Forum, career fairs): include who and how - Through University: include the university name - Specialized website (Metjobs, BIB, other): include which one - Other social Networks: (Twitter, Facebook, Instagram, Youtube): include which one - Other (Glassdoor, ResearchGate, job search website and other cases): include which one
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Please, upload your CV document using the following name structure: Name_Surname_CoverLetter
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Please, upload your CV document using the following name structure: Name_Surname_OtherDocument
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** Consider that the information provided in relation to gender and nationality will be used solely for statistical purposes.