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2011

Towards improved survivability in safety-critical systems

International On-Line Testing Symposium (IOLTS)

J. Abella, F. Cazorla, E. Quinones, A. Grasset, S. Yehia, P. Bonnot, D. Gizopoulos, R. Mariani, and G. Bernat
Exploiting Intra-Task Slack Time of Load Operations for DVFS in Hard Real-Time Multi-core Systems

In Work in Progess (WiP), under the the 24nd Euromicro Conference on Real-Time Systems (ECRTS 2011)

E. Quinones, J. Abella, F. Cazorla, and M. Valero
Online Performance Prediction in Processors with DVFS Capabilities

ACACES 2011. Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems

Q. Liu, M. Moreto, J. Abella, and F. Cazorla
RVC-based time-predictable faulty caches for safety-critical systems.

IOLTS

J. Abella, E. Quinones, F. Cazorla, M. Valero, and Y. Sazeides
A Case for Energy-Aware Accounting and Billing in Large-Scale Computing Facilities Cost Metrics and Design Implications.

IEEE Micro

V. Jimenez, F. Cazorla, R. Gioiosa, E. Kursun, C. Isci, A. Buyuktosunoglu, P. Bose, and M. Valero
Characterizing Power and Temperature Behavior of POWER6-Based System

IEEE Journal of Emerging and Selected Topics in Circuits and Systems

V. Jimenez, F. Cazorla, R. Gioiosa, M. Valero, C. Boneti, E. Kursun, C. Cher, C. Isci, A. Buyuktosunoglu, and P. Bose
A Quantitative Analysis of OS Noise

A. Morari, R. Gioiosa, R. Wisniewski, F. Cazorla, and M. Valero
IA3: An Interference Aware Allocation Algorithm for Multicore Hard Real-Time Systems

M. Paolieri, E. Quinones, F. Cazorla, R. I. Davis, and M. Valero
A Software-Pipelined Approach to Multicore Execution of Timing Predictable Multi-Threaded Hard Real-Time Tasks

M. Paolieri, E. Quinones, J. Wolf, Z. Petrov, F. Cazorla, S. Uhrig, and T. Ungerer
RVC: A Mechanism for Time-Analyzable Real-Time Processors with Faulty Caches

J. Abella, E. Quinones, F. Cazorla, Y. Sazeides, and M. Valero

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