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2004

A Low Complexity Fetch Architecture for High Performance Superscalar Processors

ACM Transactions on Architecture and Compiler Optimizations (TACO)

M. Valero, O. J. Santana, A. Ramirez, and J. Lluis Larriba-Pey
Predictable Performance in SMT Processors

Computing Frontiers (CF'04)

F. Cazorla, P. Knijnenburg, R. Sakellariou, E. Fernández, A. Ramirez, and M. Valero

2003

Ephemeral Registers with Multicheckpointing

A. Cristal, J. F. Martínez, J. Llosa, and M. Valero
Content Aware Register File Organisation

R. González, A. Cristal, D. Ortega, and M. Valero
A Case for Resource-conscious Out-of-order Processors

A. Cristal, J. F. Martínez, J. Llosa, and M. Valero
Out-of-Order Commit Processors

A. Cristal, J. F. Martínez, D. Ortega, J. Llosa, and M. Valero
A Simple Low-Energy Instruction Wakeup Mechanism

5th International Symposium on High Performance Computing (ISHPC-V)

M. A. Ramírez, A. Cristal, A. Veidenbaum, L. A. Villa, and M. Valero
Kilo-instruction Processors

5th International Symposium on High Performance Computing (ISHPC-V)

A. Cristal, D. Ortega, J. Llosa, and M. Valero
A Case for Resource Conscious Out-of-Order Processor

MEDEA Workshop MEmory performance: DEaling with Applications , systems and architecture (MEDEA 2003)

A. Cristal, J. F. Martínez, J. Llosa, and M. Valero
A Low-Power-Instruction-Queue Wakeup Mechanism

XIV Jornadas de Paralelismo

M. A. Ramírez, A. Cristal, A. Veidenbaum, L. A. Villa, and M. Valero

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