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2012

Optimal Task Assignment in Multithreaded Processors: A Statistical Approach

Architectural Support for Programming Languages and Operating Systems (ASPLOS)

P. Radojkovic, V. Cakarevic, M. Moreto, J. Verdu, A. Pajuelo, F. Cazorla, M. Nemirovsky, and M. Valero
Hardware/Software Techniques for Assisted Execution Runtime Systems

The 2nd Workshop on Runtime Environments, Systems, Layering and Virtualized Environments (RESoLVE)

G. Kestor, R. Gioiosa, O. Unsal, A. Cristal, and M. Valero
On the Simulation of Large-scale Architectures Using Multiple Application Abstraction Levels

ACM Transactions on Architecture and Code Optimization

A. Rico, F. Cabarcas, C. Villavieja, M. Pavlovic, A. Vega, Y. Etsion, A. Ramirez, and M. Valero

2011

Energy-Aware Accounting and Billing in Large-Scale Computing Facilities

Micro, IEEE

V.. Jimenez, R.. Gioiosa, F. Cazorla, M. Valero, E.. Kursun, C.. Isci, A.. Buyuktosunoglu, and P.. Bose
Quantifying the Potential Task-Based Dataflow Parallelism in MPI Applications

Euro-Par 2011 Parallel Processing

V. Subotic, R. Ferrer, J C. Sancho, J. Labarta, and M. Valero
The Impact of Application's Micro-Imbalance on the Communication-Computation Overlap

Parallel, Distributed and Network-Based Processing (PDP), 2011 19th Euromicro International Conference on

V. Subotic, J C. Sancho, J. Labarta, and M. Valero
From plasma to beefarm: Design experience of an FPGA-based multicore prototype

Reconfigurable Computing: Architectures, Tools and Applications

N. Sonmez, O. Arcas, G. Sayilar, O. Unsal, A. Cristal, I. Hur, S. Singh, and M. Valero
Object Orienteed Execution Model (OOM)

2nd Workshop on New Directions in Computer Architecture (NDCA-2) Held in Conjunction with the 38th International Symposium on Computer Architecture (ISCA-38)

N. Markovic, D. Nemirovsky, R. González, O. Unsal, M. Valero, and A. Cristal
TMbox: A Flexible and Reconfigurable 16-Core Hybrid Transactional Memory System

Proc. FCCM '11

N. Sonmez, O. Arcas, O. Pflucker, O. Unsal, A. Cristal, I. Hur, S. Singh, and M. Valero
From Plasma to BeeFarm: Design Experience of an FPGA-based Multicore Prototype

ARC'11

N. Sonmez, O. Arcas, G. Sayilar, O. Unsal, A. Cristal, I. Hur, S. Singh, and M. Valero

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