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2016

Fitting processor architectures for measurement-based probabilistic timing analysis

Microprocessors and Microsystems

L. Kosmidis, E. Quiñones, J. Abella, T. Vardanega, C. Hernández, A. Gianarro, I. Broster, and F. J. Cazorla
Fitting processor architectures for measurement-based probabilistic timing analysis

Microprocessors and Microsystems

L. Kosmidis, E. Quinones, J. Abella, T. Vardanega, C. Hernández, A. Gianarro, I. Broster, and F. Cazorla
Improving performance guarantees in wormhole mesh NoC designs

2016 Design, Automation Test in Europe Conference Exhibition (DATE)

M.. Panić, C.. Hernandez, J. Abella, A.. Roca, E. Quinones, and F. Cazorla
Modeling High-Performance Wormhole NoCs for Critical Real-Time Embedded Systems

2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS)

M. Panic, C. Hernández, E. Quinones, J. Abella, and F. Cazorla
PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis

2016 Euromicro Conference on Digital System Design (DSD)2016 Euromicro Conference on Digital System Design (DSD)

F. Cazorla, J. Abella, J. Andersson, T. Vardanega, F. Vatrinet, I. Bate, I. Broster, M. Azkarate-Askasua, F. Wartel, L. Cucu, F. Cros, G. Farrall, A. Gogonel, A. Gianarro, B. Triquet, C. Hernández, C. Lo, C. Maxim, D. Morales, E. Quinones, E. Mezzetti, L. Kosmidis, I. Aguirre, M. Fernández, M. Slijepcevic, P. Conmy, and W. Talaboulma
pTNoC: Probabilistically Time-Analyzable Tree-Based NoC for Mixed-Criticality Systems

2016 Euromicro Conference on Digital System Design (DSD)2016 Euromicro Conference on Digital System Design (DSD)

M. Slijepcevic, M. Fernández, C. Hernández, J. Abella, E. Quinones, and F. Cazorla
Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore

ACM Trans. Embed. Comput. Syst.

T. Ungerer, C. Bradatsch, M. Frieb, F. Kluge, J. Mische, A. Stegmeier, R. Jahr, M. Gerdes, P. Zaykov, L. Matusova, Z. Jian Jia Li, Z. Petrov, B. Böddeker, S. Kehr, H. Regler, A. Hugl, C. Rochange, H. Ozaktas, H. Cassé, A. Bonenfant, P. Sainrat, N. Lay, D. George, I. Broster, E. Quinones, M. Panic, J. Abella, C. Hernández, F. Cazorla, S. Uhrig, M. Rohde, and A. Pyka
Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis

19th Euromicro Conference on Digital Systems Design (DSD)

F. Cazorla, J. Abella, J. Andersson, T. Vardanega, F. Vatrinet, I. Bate, I. Broster, M. Azkarate-askasua, F. Wartel, L. Cucu-Grosjean, F. Cros, G. Farrall, A. Gogonel, A. Gianarro, B. Triquet, C. Hernández, C. Lo, C. Maxim, D. Morales, E. Quinones, E. Mezzetti, L. Kosmidis, I. Agirre, M. Fernández, M. Slijepcevic, P. Ryan Conmy, and W. Talaboulma
Modeling RTL Fault Models Behavior to Increase the Confidence on TSIM-based Fault Injection

22nd IEEE International On-Line Testing Symposium (IOLTS)

J. Espinosa, C. Hernández, and J. Abella
Random Modulo: a New Processor Cache Design for Real-Time Critical Systems

53rd Design Automation Conference (DAC)

C. Hernández, J. Abella, A. Gianarro, J. Andersson, and F. Cazorla

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