Publicaciones

Exportar resultados como:

Mostrando 21 - 30 resultados de 30

2010

Portable, Scalable, per-Core Power Estimation for Intelligent Resource Management

B. Goel, S. A. McKee, R. Gioiosa, K. Singh, M. Bhadauria, and M. Cesati
J-DSE: Joint Software and Hardware Design Space Exploration for Application Specific Processors

M. Paolieri, I. Bonesana, R. Gioiosa, and M. Valero

2009

CPU accounting in CMP Processors

C. Luque, M. Moreto, F. Cazorla, R. Gioiosa, A. Buyuktosunoglu, and M. Valero
ITCA: Inter-Task Conflict-Aware CPU Accounting for CMPs

C. Luque, M. Moreto, F. Cazorla, R. Gioiosa, A. Buyuktosunoglu, and M. Valero

2008

Scheduling Real-Time Systems With Explicit Resource Allocation Processors

C. Boneti, F. Cazorla, R. Gioiosa, and M. Valero
Understanding the overhead of the spin-lock loop in CMT architectures

V. Cakarevic, P. Radojkovic, J. Verdú, A. Pajuelo, R. Gioiosa, F. Cazorla, M. Nemirovsky, and M. Valero
Measuring Operating System Overhead on CMT Processors

P. Radojkovic, V. Cakarevic, J. Verdú, A. Pajuelo, R. Gioiosa, F. Cazorla, M. Nemirovsky, and M. Valero
A Dynamic Scheduler for Balancing HPC Applications

C. Boneti, R. Gioiosa, F. Cazorla, and M. Valero
Software-Controlled Priority Characterization of POWER5 Processor

International Symposium on Computer Architecture (ISCA)

C. Boneti, F. Cazorla, R. Gioiosa, C-Y. Cher, A. Buyuktosunoglu, and M. Valero
Balancing HPC Applications Through Smart Allocation of Resources in MT Processors

C. Boneti, F. Cazorla, R. Gioiosa, J. Corbalán, J. Labarta, and M. Valero

Páginas