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2019

The Mont-Blanc Prototype

Contemporary High Performance Computing (From Petascale toward Exascale, Volume 3)

F. Mantovani, D. Ruiz, L. Bautista-Gomez, V. Mehta, F. Banchelli, N. Rajovic, E. Ayguadé, J. Labarta, M. Valero, A. Rico, A. Ramirez, M. Geimer, and D. Tafani

2017

Task scheduling techniques for asymmetric multi-core systems

IEEE Transactions on Parallel and Distributed Systems

K. Chronaki, A. Rico, M. Casas, M. Moreto, R. M. Badia, E. Ayguadé, J. Labarta, and M. Valero
Sharing the Instruction Cache Among Lean Cores on an Asymmetric CMP for HPC Applications

International Symposium on Performance Analysis of Systems and Software (ISPASS 2017)

U. Milic, A. Rico, P. Carpenter, and A. Ramirez

2016

TaskPoint: Sampled simulation of task-based programs

Performance Analysis of Systems and Software (ISPASS), 2016 IEEE International Symposium on

T. Grass, A. Rico, M. Casas, M. Moreto, and E. Ayguade
Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors

International Journal of Parallel Programming

V. Garcia, A. Rico, C. Villavieja, P. Carpenter, N. Navarro, and A. Ramirez

2014

Tibidabo: Making the case for an ARM-based HPC system

Future Generation Computer Systems

N. Rajovic, A. Rico, N. Puzovic, C. Adeniyi-Jones, and A. Ramirez
Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors

Third International Workshop On-chip memory hierarchies and interconnects: organization, management and implementation

V. Garcia, A. Rico, C. Villavieja, P. Carpenter, N. Navarro, and A. Ramirez
Evaluating Execution Time Predictability of Task-Based Programs

7th International Workshop on Multi-/Many-Core Computing Systems

T. Grass, A. Rico, M. Casas, M. Moreto, and A. Ramirez
Task Sampling: Computer Architecture Simulation in the Many-Core Era

Advanced Computer Architecture and Compilation for for High-Performance and Embedded Systems

T. Grass, A. Rico, M. Casas, M. Moreto, and A. Ramirez
Sharing the Instruction Cache Among Multiple Cores for HPC Applications

Advanced Computer Architecture and Compilation for for High-Performance and Embedded Systems

U. Milic, A. Rico, and A. Ramirez

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