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2021

Morrigan: A composite instruction TLB prefetcher

54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

G. Vavouliotis, L. Álvarez, B. Grot, D. Jiménez, and M. Casas

2013

Automatic Design Exploration Framework for Multicores with Reconfigurable Accelerators

WRC 2013 : 7th HiPEAC Workshop on Reconfigurable Computing

C. González, H. Ishikawa, A. Hayashi, D. Jiménez, C. Álvarez, K. Kimura, and H. Kasahara
FPGA-Based Prototype of the Task Superscalar Architecture

WRC 2013 : 7th HiPEAC Workshop on Reconfigurable Computing

F Y. Ahmadabadi, D. Jiménez, C. Álvarez, Y. Etsion, and R. M. Badia
Heterogeneous tasking on SMP/FPGA SoCs: the case of OmpSs and the Zynq

21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)

A. Filgueras, E. Gil, C. Álvarez, D. Jiménez, X. Martorell, J. Langer, and J. Noguera
Analysis of the Task Superscalar Architecture Hardware Design

2013 International Conference on Computational Science

F Y. Ahmadabadi, D. Jiménez, C. Álvarez, Y. Etsion, and R. M. Badia

2011

Automatic generation of application-specific hardware accelerators on OpenSPARC

International Symposium on Code Generation and Optimization (CGO 2011)

C. González, M. Fernández, D. Jiménez, C. Álvarez, and X. Martorell
Automatic Generation and Testing of Application Specific Hardware Accelerators on a New Reconfigurable OpenSPARC Platform

5th HiPEAC Workshop on Reconfigurable Computing (WRC 2011)

C. González, M. Fernández, D. Jiménez, C. Álvarez, and X. Martorell

2007

A Flexible Heterogeneous Multi-Core Architecture

The 2007 International Conference on Parallel Architectures and Compilation Techniques (PACT 2007)

M. Pericas, A. Cristal, F. Cazorla, R. González, D. Jiménez, and M. Valero

2006

A decoupled KILO-instruction processor

The 12th International Symposium on High-Performance Computer Architecture (HPCA-12)

M. Pericas, A. Cristal, R. González, D. Jiménez, and M. Valero