Description
There is an ever-increasing demand both for new functionality and for reduced development and production costs for all kinds of Critical Real-Time Embedded (CRTE) systems (safety, mission or business critical). Moreover, new functionality demands can only be delivered by more complex software and aggressive hardware acceleration features like memory hierarchies and multi-core processors. However, these greatly increase system complexity, making it much more difficult to analyse applications for their temporal behaviour. Another key problem of CRTE systems is the need to prove that they operate correctly, satisfying all temporal constraints. At the time pd designing this project, the generation of platforms, despite being based on comparatively simple and old processor technologies, were already extremely difficult to analyse for their temporal behaviour, and resulting errors in operation, cost EU industries billions of Euros annually in warranty and post-production costs.
The PROARTIS thesis was that the timing behaviour of systems that use advanced hardware features like multi-core CPUs and complex memory hierarchies can be analysed effectively by probabilistic timing analysis techniques that reduce the risk of temporal pathological cases to quantifiably negligible levels. Preliminary research results in cache replacement policies by members of the PROARTIS consortium strongly supported this claim.
PROARTIS defined new hardware and software architecture paradigms based on the concept of randomisation that, with minimal changes to current processes and methods, guarantee timing behaviours that can be analysed with probabilistic techniques. PROARTIS used a holistic approach in which probabilistic analysis extends from hardware design, compiler and real time operating system to applications. On top of this platform, we built probabilistic timing analysis methods based on current commercial tools. We validated our approach via an industrial case study.
