Eventos

Mostrando 111 - 120 de 192
  • 14 Nov 2017

    SORS:Re-interpreting thermodynamic Arctic sea ice feedbacks

    Formación
    Ubicación: Sala d´actes, FIB
    2017-11-14 12:30:00 2017-11-14 12:30:00 Europe/Madrid SORS:Re-interpreting thermodynamic Arctic sea ice feedbacks For details, click on the following event link: https://www.bsc.es/es/research-and-development/research-seminars/sorsre-interpreting-thermodynamic-arctic-sea-ice-feedbacks Sala d´actes, FIB
  • 2017-11-02 11:00:00 2017-11-02 11:00:00 Europe/Madrid SORS: Magnetic nuclear fusion and fast ion driven Alfvén instabilities For details, click on the following event link: https://www.bsc.es/es/research-and-development/research-seminars/sors-magnetic-nuclear-fusion-and-fast-ion-driven-alfv%C3%A9n-instabilities ---
  • 23 Oct 2017

    SORS:Is Computer Science Dying?

    Formación
    Ubicación:   Room: C6-E101
    2017-10-23 11:00:00 2017-10-23 11:00:00 Europe/Madrid SORS:Is Computer Science Dying? For details, click on the following event link: https://www.bsc.es/es/research-and-development/research-seminars/sorsis-computer-science-dying   Room: C6-E101

    This seminar is jointly organized with the High Performance Computing research group (CAP) of the Computer Architecture Department at UPC.

  • 2017-10-04 11:00:00 2017-10-04 11:00:00 Europe/Madrid SORS: Yet Another Stencil Kernel (YASK): scaling-out HPC optimization for Intel® Xeon® and Xeon Phi™ processors For details, click on the following event link: https://www.bsc.es/es/research-and-development/research-seminars/sors-yet-another-stencil-kernel-yask-scaling-out-hpc-optimization-intel%C2%AE-xeon%C2%AE-and-xeon-phi%E2%84%A2 ---
  • 11 Jul 2017

    SORS: Performance Matters

    Formación
    Ubicación: Sala D'Actes, FIB
    2017-07-11 15:00:00 2017-07-11 15:00:00 Europe/Madrid SORS: Performance Matters For details, click on the following event link: https://www.bsc.es/es/research-and-development/research-seminars/sors-performance-matters Sala D'Actes, FIB

    The most common software update on the AppStore *by far* is "Bug fixes and performance enhancements." Now that Moore's Law Free Lunch has ended, programmers have to work hard to get high performance for their applications. But why is performance so hard to deliver?

  • 27 Jun 2017

    SORS: A Memory Model for RISC-V

    Formación
    Ubicación: Sala d´Actes. FIB
    2017-06-27 11:00:00 2017-06-27 11:00:00 Europe/Madrid SORS: A Memory Model for RISC-V For details, click on the following event link: https://www.bsc.es/es/research-and-development/research-seminars/sors-memory-model-risc-v Sala d´Actes. FIB
  • 14 Jun 2017

    SORS: Machine Learning for Microarchitectural Prediction

    Ubicación: Building C6, room E106, Campus Nord
    2017-06-14 12:00:00 2017-06-14 12:00:00 Europe/Madrid SORS: Machine Learning for Microarchitectural Prediction For details, click on the following event link: https://www.bsc.es/es/research-and-development/research-seminars/sors-machine-learning-microarchitectural-prediction Building C6, room E106, Campus Nord
  • 12 Jun 2017

    SORS: Tomorrow’s Memory Systems, 2017 Edition

    Ubicación: Sala D'Actes, FIB Building (B6), Campus Nord, Barcelona  
    2017-06-12 11:00:00 2017-06-12 11:00:00 Europe/Madrid SORS: Tomorrow’s Memory Systems, 2017 Edition For details, click on the following event link: https://www.bsc.es/es/research-and-development/research-seminars/sors-tomorrow%E2%80%99s-memory-systems-2017-edition Sala D'Actes, FIB Building (B6), Campus Nord, Barcelona  

    This talk will discuss recent technologies that Bruce Jacob and his group have helped to develop in high-performance systems, including Micron’s Hybrid Memory Cube, flash-based main memories, and high-bandwidth/high-capacity memory, and will discuss the impact of tomorrow’s memory technologies on tomorrow’s applications and operating systems.

  • 07 Jun 2017

    SORS: RISC-V: Instruction sets want to be free

    Formación
    Ubicación: Sala d´Actes FIB.
    2017-06-07 12:00:00 2017-06-07 12:00:00 Europe/Madrid SORS: RISC-V: Instruction sets want to be free For details, click on the following event link: https://www.bsc.es/es/research-and-development/research-seminars/sors-risc-v-instruction-sets-want-be-free Sala d´Actes FIB.

    This talk will cover the technical features of the RISC-V ISA design, which has the goals of scaling from the tiniest implementations for IoT up to the largest warehouse-scale computers, with support for extensive customization. We'll also describe industry-competitive open-source cores developed at UC Berkeley, all written in Chisel, a productive new open-source hardware design language.

  • 06 Jun 2017
    2017-06-06 12:00:00 2017-06-06 12:00:00 Europe/Madrid SORS: Processor Paradigms: Evolution or Disruption For details, click on the following event link: https://www.bsc.es/es/research-and-development/research-seminars/sors-processor-paradigms-evolution-or-disruption Sala d´Actes FIB

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