Research Engineer/Researcher - Software/hardware engineers for emerging technologies (RE1-4/R1-4/R0)

The Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses MareNostrum, one of the most powerful supercomputers in Europe, was a founding and hosting member of the former European HPC infrastructure PRACE (Partnership for Advanced Computing in Europe), and is now hosting entity for EuroHPC JU, the Joint Undertaking that leads large-scale investments and HPC provision in Europe. The mission of BSC is to research, develop and manage information technologies in order to facilitate scientific progress. BSC combines HPC service provision and R&D into both computer and computational science (life, earth and engineering sciences) under one roof, and currently has over 900 staff from 55 countries.

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We are particularly interested for this role in the strengths and lived experiences of women and underrepresented groups to help us avoid perpetuating biases and oversights in science and IT research. In instances of equal merit, the incorporation of the under-represented sex will be favoured.

The Barcelona Supercomputing Center (BSC) www.bsc.es is embarking on an umbrella of large-scale projects to contribute in the BSCs next generation supercomputer, the Marenostrum 6 (MN6), which will be operational in 2028/2029. In this ambitious and potentially rewarding endeavor, we need engineers and computer scientists at all levels of expertise (from 0 to 20+ years) and in both software and hardware fields. The final team will be around 100 engineers and scientists. The applicants would ideally have experience/ambition in at least one or more of the following fields:

· System software (operating system), including the development of new Linux services, tools, and drivers. Service visualization and containerization. Good understanding of the Linux kernel.
· Compilers, including the development of the LLVM compiler to target new features and/or optimizations (aimed at improving the performance of applications that are currently exploiting the RISC-V ISA).
· Parallel libraries and runtimes, including the development of new features and extensions in parallel library/runtime’s systems for HPC programming models (e.g., MPI, OpenMP, SyCL), and workflow executions (e.g., COMPSs).
· Parallel numerical frameworks, including the use and development of numerical libraries (e.g., BLIS, OpenBLAS), and data analytic frameworks (e.g., Pythorch, Tensor Flow).
· HPC analysis, including the performance analysis of HPC applications, as well as the development of new tools (e.g., Extrae/Paraver) and benchmarks that may help to characterize the system behavior.
· HPC application engineering, including the understanding of actual scientific HPC applications (usually written in C/C++ and Fortran), and the development of modifications/extensions that may improve their performance.
· HPC resource awareness, including a good understanding of the underlying resource utilization and management in terms of nodes, processors, and memory (e.g., Slurm, DLB, Elasticity, DMRLib,...).
· Hardware engineering, including processor architecture and micro-architecture, accelerators, memory hierarchy, memory controllers, HBM, FPGA's, RTL design, VHDL, verilog, System C, System Verilog, place and route, timing closure, verification, validation, CI, post-silicon debug, DFT, and gate-level simulation