Adrian Cristal Kestelman

2014

• Combining Error Detection and Transactional Memory for Energy-efficient Computing below Safe Operation Margins

  22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing

  G. Yalcin, A. Sobe, A. Voronin, J-T. Wamhoff, D. Harmanci, A. Cristal, O. Unsal, P. Felber, and C. Fetzer
• Exploiting a Fast and Simple ECC for Scaling Supply Voltage in Level-1 Caches

  20th IEEE International On-Line Testing Symposium

  G. Yalcin, E. Islek, O. Tozlu, P. Reviriego, A. Cristal, O. Unsal, and O. Ergin
• Leveraging a Task-based Asynchronous Dataflow Substrate for Efficient and Scalable Resiliency

  Euro-TM/MEDIAN Workshop on Dependable Multicore and Transactional Memory Systems 2014

  O. Subasi, J. Arias Moreno, J. Labarta, O. Unsal, and A. Cristal
• Profile-Guided Transaction Coalescing—Lowering Transactional Overheads by Merging Transactions

  ACM Transactions on Architecture and Code Optimization 2014

  S. Stipic, V. Smiljkovi, O. Unsal, A. Cristal, and M. Valero
• PAMS: Pattern Aware Memory System for Embedded Systems

  ReConFig - International Conference on ReConFifurable Computing and FPGAs

  T. Hussain, N. Sönmez, O. Palomar, O. Unsal, A. Cristal, E. Ayguade, and M. Valero
• AMMC: Advanced Multi-core Memory Controller

  13th International Conference on Field Programmable Technology (FPT 2014)

  T. Hussain, O. Palomar, A. Cristal, O. Unsal, E. Ayguade, and M. Valero
• An empirical evaluation of High-Level Synthesis languages and tools for database acceleration

  24th International Conference on Field Programmable Logic and Applications (FPL), 2014

  O. Arcas, G. Ndu, N. Sönmez, M. Ghasempour, A. Armejach, J. Navaridas, W. Song, J. Mawer, A. Cristal, and M. Lujan
• System-Level Power and Energy Estimation Methodology for Open Multimedia Applications Platforms

  IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

  S. KumarRethinagiri, O. Palomar, J. Arias Moreno, O. Unsal, A. Cristal, and M. Biglari-Abhar
• VPPET: Virtual Platform Pow er and Energy Estimation Tool for Heterogeneous MPSoC based FPGA Platforms

  4th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)

  S. KumarRethinagiri, O. Palomar, J. Arias Moreno, A. Cristal, and O. Unsal
• DESSERT: DESign Space ExploRation Tool based on Power and Energy at System-Level

  27th IEEE International System-on-Chip Conference

  S. KumarRethinagiri, O. Palomar, A. Cristal, O. Unsal, and M. Swift