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Mostrant 181 - 190 resultats de 339

2012

Integrating Dataflow Abstractions into the Shared Memory Model

Computer Architecture and High Performance Computing (SBAC-PAD), 2012 IEEE 24th International Symposium on

V. Gajinov, S. Stipić, O. Unsal, T. Harris, E. Ayguade, and A. Cristal
Hardware-software coherence protocol for the coexistence of caches and local memories

Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis

L. Alvarez, L. Vilanova, M. González, X. Martorell, N. Navarro, and E. Ayguade
A Systematic Methodology to Generate Decomposable and Responsive Power Models for CMPs

Computers, IEEE Transactions on

R. Bertran, M. Gonzalez Tallada, X. Martorell, N. Navarro, and E. Ayguade
Energy accounting for shared virtualized environments under DVFS using PMC-based power models

Future Generation Computer Systems

R. Bertran, Y. Becerra, D. Carrera, VÃ§ B. n, M. González, X. Martorell, N. Navarro, J. Torres, and E. Ayguade
DMA-circular: an enhanced high level programmable DMA controller for optimized management of on-chip local memories

Proceedings of the 9th conference on Computing Frontiers (CF)

N. Vujic, L. Alvarez, M. González, X. Martorell, and E. Ayguade
Counter-Based Power Modeling Methods: Top-Down vs. Bottom-Up

The Computer Journal

R. Bertran, M. González, X. Martorell, N. Navarro, and E. Ayguade
PPMC : A Programmable Pattern based Memory Controller

Applied Reconfigurable Computing (ARC)

T. Hussain, M. Shafiq, M. Pericas, N. Nacho, and E. Ayguade
Productive Programming of GPU Clusters with OmpSs

26th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2012)

J. Bueno-Hedo, J. Planas, A. Duran, R. M. Badia, X. Martorell, E. Ayguade, and J. Labarta
Hybrid/Heterogeneous Programming with OmpSs and its Software/Hardware Implications

Programming Multi-Core and Many-Core Computing Systems (Wiley Series on Parallel and Distributed Computing)

E. Ayguade, R. M. Badia, P. Bellens, J. Bueno-Hedo, A. Duran, Y. Etsion, M. Farreras, R. Ferrer, J. Labarta, V. Marjanovic, L. Martinell, X. Martorell, J. M. Pérez, J. Planas, A. Ramirez, X. Teruel, I. Tsalouchidou, and M. Valero
DMA++: On the Fly Data Realignment for On-Chip Memories

Computers, IEEE Transactions on

N. Vujic, F. Cabarcas, M. González, A. Ramirez, X. Martorell, and E. Ayguade

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