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2004

DCache Warn: An I-Fetch Policy To Increase SMT Efficiency

18th International Parallel and Distributed Processing Symposium (IPDPS-2004)

F. Cazorla, E. Fernández, A. Ramirez, and M. Valero
Dynamically Controlled Resource Allocation in SMT Processors

37th Annual International Symposium on Microarchitecture (MICRO-37)

F. Cazorla, A. Ramirez, M. Valero, and E. Fernández
QoS for High-Performance SMT Processors in Embedded Systems

IEEE Micro

F. Cazorla, A. Ramirez, M. Valero, P. Knijnenburg, R. Sakellariou, and E. Fernández
Predictable Performance in SMT Processors

Computing Frontiers (CF'04)

F. Cazorla, P. Knijnenburg, R. Sakellariou, E. Fernández, A. Ramirez, and M. Valero

2003

Basolateral LAT-2 has a major role in the transepithelial flux of L-cystine in the renal proximal tubule cell line OK.

E. Fernández, D. Torrents, J. Chillarón, M. Del Rio, A. Zorzano, and M. Palacín
Improving Memory Latency Aware Fetch Policies for SMT Processors

5th International Symposium on High Performance Computing (ISHPC-V)

F. Cazorla, E. Fernández, A. Ramirez, and M. Valero

2002

Analisis y caracterización de los bucles

XIII Jornadas de Paralelismo

A. García, E. Fernández, P. Medina, A. Ramirez, and M. Valero
Estudio y evaluación de mecanismos de control de la Especulación

In XIII Jornadas de Paralelismo, Lleida (Spain)

F. Cazorla, P. Medina, E. Fernández, A. Ramirez, and M. Valero
A Comprehensive Analysis of Indirect Branch Prediction

4th International Symposium on High Performance Computing (ISHPC-4)

O. J. Santana, A. Falcón, E. Fernández, P. Medina, A. Ramirez, and M. Valero
Studying New Ways for Improving Adaptive History Length Branch Predictors

4th International Symposium on High Performance Computing (ISHPC-4)

A. Falcón, O. J. Santana, P. Medina, E. Fernández, A. Ramirez, and M. Valero

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