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2004

Prophet/Critic Hybrid Branch Prediction

31st Annual International Symposium on Computer Architecture (ISCA-31)

A. Falcón, J. Stark, A. Ramirez, K. Lai, and M. Valero
A Complexity-Effective Decoding Architecture Based on Instruction Streams

Workshop on Complexity-Effective Design (WCED)

O. J. Santana, A. Falcón, A. Ramirez, and M. Valero
A Low-Complexity, High-Performance Fetch Unit for Simultaneous Multithreading Processors

10th International Conference on High Performance Computer Architecture (HPCA-10)

A. Falcón, A. Ramirez, and M. Valero
A latency conscious SMT branch predictor architecture

International Journal of High Performance Computing and Networking (IJHPCN)

A. Falcón, O. J. Santana, A. Ramirez, and M. Valero

2003

Tolerating branch predictor latency on SMT

5th International Symposium on High Performance Computing (ISHPC-V)

A. Falcón, O. J. Santana, A. Ramirez, and M. Valero

2002

A Comprehensive Analysis of Indirect Branch Prediction

4th International Symposium on High Performance Computing (ISHPC-4)

O. J. Santana, A. Falcón, E. Fernández, P. Medina, A. Ramirez, and M. Valero
Studying New Ways for Improving Adaptive History Length Branch Predictors

4th International Symposium on High Performance Computing (ISHPC-4)

A. Falcón, O. J. Santana, P. Medina, E. Fernández, A. Ramirez, and M. Valero

2001

An In-Depth Evaluation of the Multi-Stage Cascaded Predictor

XII Jornadas de Paralelismo, Valencia (Spain)

O. J. Santana, A. Falcón, E. Fernández, P. Medina, A. Ramirez, and M. Valero
An Analysis of Dynamic History Length Fitting

XII Jornadas de Paralelismo, Valencia (Spain)

A. Falcón, O. J. Santana, P. Medina, E. Fernández, A. Ramirez, and M. Valero

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