Description
To achieve high performance and high energy efficiency on near-future exascale computing systems, a technology gap needs to be bridged: increase efficiency of computation with extreme efficiency in HW and new arithmetics, as well as providing methods and tools for seamless integration of reconfigurable accelerators in heterogeneous HPC multi-nodeplatforms.
TEXTAROSSA aims at tackling this gap through applying a co-design approach to heterogeneous HPC solutions, supported by the integration and extension of IPs, programming models and tools derived from European research projects, led by TEXTAROSSA partners. The main directions for innovation are towards:
i) enabling mixed-precision computing, through the definition of IPs, libraries, and compilers supporting novel data types (including Posits), used also to boost the performance of stencil/tensor accelerators;
ii) implementing new multilevel thermal management and two-phase liquidcooling;
iii) developing improved data movement and storage tools through efficient lossy compression;
iv) ensure secure HPC operation through HW accelerated homomorphic cryptography and high-speed on-the-fly encrypted access to HBM (high bandwidth memories);
v) providing RISC-V based IP for fast task scheduling and IPs for low-latency intra/inter-node communication.
These technologies will be tested on the Integrated Development Vehicles mirroring and extending the European Processor Initiative ARM64-based architecture, and on an OpenSequana testbed. To drive the technology development and assess the impact of the proposed innovations, from node to system levels, TEXTAROSSA will use aselected but representative number of HPC, HPDA and AI demonstrators covering challenging HPC domains such as general-purpose numerical kernels, High Energy Physics (HEP), Oil & Gas, climate modelling, and emerging domains suchas High Performance Data Analytics (HPDA) and High Performance Artificial Intelligence (HPC-AI).
