Hardware Round-Robin Scheduler for Single-ISA Asymmetric Multi-core
URL: http://link.springer.com/chapter/10.1007%2F978-3-662-48096-0_10
Authors: Träff, Jesper / Hunold, Sascha / Versaci, Francesco / Markovic, Nikola / Nemirovsky, Daniel / Milutinović, Veljko / Unsal, Osman / Valero, Mateo / Cristal, Adrián
Publication: Euro-Par 2015: Parallel Processing
Place Published: Berlin, Heidelberg
Volume / Pagination: 9233 / 122-134