AYGUADE PARRA, EDUARD

2014
J. Polo, Becerra, Y., Carrera, D., Torres, J., Ayguadé, E., and Steinder, M., Adaptive MapReduce Scheduling in Shared Environments, in 14th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing, Chicago, IL, United States, 2014, pp. 61–70.
T. Hussain, Palomar, O., Unsal, O., Cristal, A., Ayguadé, E., and Valero, M., Advanced Pattern based Memory Controller for FPGA based HPC Applications, in International Conference on High Performance Computing {&} Simulation, HPCS 2014, Bologna, Italy, 2014, pp. 287–294.
T. Hussain, Palomar, O., Cristal, A., Unsal, O., Ayguadé, E., and Valero, M., AMMC: Advanced Multi-core Memory Controller, in 13th International Conference on Field Programmable Technology (FPT 2014), Shangai, China, 2014.
B. Dickov, Pericas, M., Carpenter, P., Navarro, N., and Ayguadé, E., Analyzing performance improvements and energy savings in Infiniband Architecture using network compression, SBAC-PAD 2014. 2014.
B. Dickov, Pericas, M., Carpenter, P., Navarro, N., and Ayguadé, E., Analyzing performance improvements and energy savings in Infiniband Architecture using network compression, in International Symposium on Computer Architecture and High Performance Computing, Paris, France, 2014, pp. 73–80.
T. Hussain, Palomar, O., Unsal, O., Cristal, A., Ayguadé, E., Valero, M., and Rethinagiri, S. Kumar, APMC: Advanced Pattern based Memory Controller, in 22nd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, United States, 2014.
T. Hussain, Palomar, O., Unsal, O., Cristal, A., Ayguadé, E., Valero, M., and Rethinagiri, S. Kumar, APMC: advanced pattern based memory controller, in International Symposium on Field-Programmable Gate Arrays (FPGA), Monterey, California, United States, 2014, pp. 252–252.
V. Subotic, Ayguadé, E., Labarta, J., and Valero, M., Automatic Exploration of Potential Parallelism in Sequential Applications, in 29th International Supercomputing Conference, ISC 2014, Leipzig, Germany, 2014, pp. 156–171.
V. Gajinov, Eric, I., Stojanovic, S., Milutinovic, V., Unsal, O., Ayguadé, E., and Cristal, A., A Case Study of Hybrid Dataflow and Shared-memory Programming Models: Dependency-based Parallel Game Engine, in 26th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2014, Paris, France, 2014, pp. 1–8.
E. F. de O. Sandes, Miranda, G., de Melo, A. Cristina M., Martorell, X., and Ayguadé, E., CUDAlign 3.0: Parallel Biological Sequence Comparison in Large GPU Clusters, 2014 14th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing, Chicago, IL, USA, May 26-29, 2014. IEEE, United States of America, pp. 160–169, 2014.
E. Sandes, Miranda, G., de Melo, A. C. M. Alve, Martorell, X., and Ayguadé, E., CUDAlign 3.0: Parallel Biological Sequence Comparison in Large GPU Clusters, in 14th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing, Chicago, IL, United States, 2014, pp. 160–169.
V. Gajinov, Eric, I., Stipic, S., Unsal, O., Ayguadé, E., and Cristal, A., DaSH: A Benchmark for Hybrid Dataflow and Shared Memory Programming Models, in ACM International Conference on Computing Frontiers, Cagliari, Italy, 2014.
A. Fernández, Beltran, V., Mateo, S., Patejko, T., and Ayguadé, E., A Data Flow Language to Develop High Performance Computing DSLs, in Fourth International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing, New Orleans, United States, 2014.
E. de Sandes, Miranda, G., Melo, A., Martorell, X., and Ayguadé, E., Fine-grain parallel megabase sequence comparison with multiple heterogeneous GPUs, in 19th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Orlando, United States, 2014, pp. 383–384.
S. Florentino, Mateo, S., Beltran, V., Bosque, J. L., Martorell, X., and Ayguadé, E., Leveraging OmpSs to Exploit Hardware Accelerators, in International Symposium on Computer Architecture and High Performance Computing, Paris, France, 2014, pp. 112–119.
T. Hussain, Palomar, O., Unsal, O., Cristal, A., Ayguadé, E., and Valero, M., MAPC. Memory Access Pattern based Controller, in 24th International Conference on Field Programmable Logic and Applications (FPL), 2014, Munich, Germany, 2014, pp. 1–4.
N. Poggi, Carrera, D., Gavaldà, R., Ayguadé, E., and Torres, J., A Methodology for the Evaluation of High Response Time on E-commerce Users and Sales, Information Systems Frontiers, vol. 16. pp. 867–885, 2014.
N. Poggi, Carrera, D., Gavaldà, R., Ayguadé, E., and Torres, J., A Methodology for the Evaluation of High Response Time on E-commerce Users and Sales, Information Systems Frontiers, vol. 16. pp. 867–885, 2014.
T. Hussain, Sönmez, N., Palomar, O., Unsal, O., Cristal, A., Ayguadé, E., and Valero, M., PAMS: Pattern Aware Memory System for Embedded Systems, in ReConFig - International Conference on ReConFifurable Computing and FPGAs, Cancun, Mexico, 2014.
T. Hussain, Sönmez, N., Palomar, O., Unsal, O., Cristal, A., Ayguadé, E., and Valero, M., PAMS: Pattern Aware Memory System for Embedded Systems, in ReConFig - International Conference on ReConFifurable Computing and FPGAs, Cancun, Mexico, 2014.
T. Hussain, Haider, A., and Ayguadé, E., PMSS: A programmable memory system and scheduler for complex memory patterns, Journal of Parallel and Distributed Computing, vol. 74. pp. 2983–2993, 2014.
T. Hussain, Haider, A., and Ayguadé, E., PMSS: A programmable memory system and scheduler for complex memory patterns, Journal of Parallel and Distributed Computing, vol. 74. pp. 2983–2993, 2014.
N. Poggi, Carrera, D., Ayguadé, E., and Torres, J., Profit-Aware Cloud Resource Provisioner for Ecommerce, in 2014 IEEE International Conference on Cluster Computing, Madrid, Spain, 2014, pp. 274–275.
T. Hussain, Palomar, O., Unsal, O., Cristal, A., Ayguadé, E., and Valero, M., PVMC: Programmable Vector Memory Controller, in IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2014), Zurich, Switzerland, 2014, pp. 240–247.
G. Ozen, Ayguadé, E., and Labarta, J., On the Roles of the Programmer, the Compiler and the Runtime System When Programming Accelerators in OpenMP, in 10th International Workshop on OpenMP, IWOMP 2014, Salvador de Bahia, Brazil, 2014, pp. 215–229.
G. Ozen, Ayguadé, E., and Labarta, J., On the Roles of the Programmer, the Compiler and the Runtime System When Programming Accelerators in OpenMP, Using and Improving OpenMP for Devices, Tasks, and More - 10th International Workshop on OpenMP, {IWOMP} 2014, Salvador, Brazil, September 28-30, 2014. Proceedings. pp. 215–229, 2014.
M. Valero, Moreto, M., Casas, M., Ayguadé, E., and Labarta, J., Runtime-Aware Architectures: A First Approach, International Journal on Supercomputing Frontiers and Innovations, vol. 1. pp. 29-44, 2014.
B. Dickov, Pericas, M., Carpenter, P., Navarro, N., and Ayguadé, E., Software-Managed Power Reduction in Infiniband Links, ICPP 2014. 2014.
B. Dickov, Pericas, M., Carpenter, P., Navarro, N., and Ayguadé, E., Software-Managed Power Reduction in Infiniband Links, in 2014 International Conference on Parallel Processing (ICPP-2014), Minneapolis, United States, 2014, pp. 311–320.
T. Hussain, Palomar, O., Unsal, O., Cristal, A., Ayguadé, E., Valero, M., and Haider, A., Stand-alone Memory Controller for Graphics System, in The 10th International Symposium on Applied Reconfigurable Computing (ARC 2014), Porto, Portugal, 2014.
A. Fernández, Beltran, V., Martorell, X., Badia, R. M., Ayguadé, E., and Labarta, J., Task-Based Programming with OmpSs and Its Application, in Workshop on Software for Exascale Computing (SPPEXA), Porto, Portugal, 2014, pp. 602–613.
J. Ciesko, Mateo, S., Teruel, X., Beltran, V., Martorell, X., Badia, R. M., Ayguadé, E., and Labarta, J., Task-Parallel Reductions in OpenMP and OmpSs, in 10th International Workshop on OpenMP, IWOMP 2014, Salvador de Bahia, Brazil, 2014, pp. 1–15.
J. Ciesko, Mateo, S., Teruel, X., Beltran, V., Martorell, X., Badia, R. M., Ayguadé, E., and Labarta, J., Task-Parallel Reductions in OpenMP and OmpSs, Using and Improving OpenMP for Devices, Tasks, and More - 10th International Workshop on OpenMP, {IWOMP} 2014, Salvador, Brazil, September 28-30, 2014. Proceedings, vol. 8766. Springer, pp. 1–15, 2014.
D. Cea, Nin, J., Tous, R., Torres, J., and Ayguadé, E., Towards the Cloudification of the Social Networks Analytics, in 11th International Conference on Modeling Decisions for Artificial Intelligence, Tokio, Japan, 2014, pp. 192–203.
M. Wong, Ayguadé, E., Gottschlich, J., Luchangco, V., de Supinski, B., and Bihari, B., Towards Transactional Memory for OpenMP, in 10th International Workshop on OpenMP, IWOMP 2014, Salvador de Bahia, Brazil, 2014, pp. 130–145.
2013
C. Cugnasco, Hernandez, R., Becerra, Y., Torres, J., and Ayguadé, E., Aeneas: A Tool to Enable Applications to Effectively Use Non-Relational Databases, 2013 International Conference on Computational Science. Elsevier, Barcelona, Spain, pp. 2561–2564, 2013.
R. Bertran, González, M., Martorell, X., Navarro, N., and Ayguadé, E., Counter-Based Power Modeling Methods: Top-Down vs. Bottom-Up, Computer Journal, vol. 56. pp. 198–213, 2013.
J. Polo, Becerra, Y., Carrera, D., Steinder, M., Whalley, I., Torres, J., and Ayguadé, E., Deadline-based MapReduce Workload Management, IEEE Transactions on Network and Service Management, vol. 10. pp. 231–244, 2013.
J. Polo, Becerra, Y., Carrera, D., Torres, J., Ayguadé, E., Spreitzer, M., and Steinder, M., Enabling Distributed Key-Value Stores with Low Latency-Impact Snapshot Support, 12th IEEE International Symposium on Network Computing and Applications. Cambridge (MA), United States, pp. 65–72, 2013.
J. Bueno-Hedo, Badia, R. M., Martorell, X., Ayguadé, E., and Labarta, J., Implementing OmpSs Support for Regions of Data in Architectures with Multiple Address Spaces, 27th International Conference on Supercomputing (ICS). ACM, Eugene, OR, United States, pp. 359–368, 2013.
R. Gayatri, Badia, R. M., and Ayguadé, E., Loop Level Speculation in a Task Based Programming Model, IEEE Conference on High Performance Computing (HiPC 2013). IEEE press, Bengaluru, India, pp. 1–10, 2013.
V. Subotic, Brinkmann, S., Marjanovic, V., Badia, R. M., Gracia, J., Niethammer, C., Ayguadé, E., Labarta, J., and Valero, M., Programmability and portability for exascale: Top down programming methodology and tools with StarSs, Journal of Computational Science, vol. 4. pp. 450–456, 2013.
J. Planas, Badia, R. M., Ayguadé, E., and Labarta, J., Self-Adaptive OmpSs Tasks in Heterogeneous Environments, The 27th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2013). IEEE, Boston, United States, pp. 138–149, 2013.
2012
B. Dickov, Pericàs, M., Houzeaux, G., Navarro, N., and Ayguadé, E., Assessing the impact of network compression on Molecular Dynamics and Finite Element Methods, 14th International Conference on High-Performance Computing and Communications (HPCC-2012). Liverpool, UK, 2012.
D. Carrera, Steinder, M., Whalley, I., Torres, J., and Ayguadé, E., Autonomic Placement of Mixed Batch and Transactional Workloads, IEEE Transactions on Parallel and Distributed Systems, vol. 23. IEEE Computer Society, Los Alamitos, CA, USA, pp. 219-231, 2012.
M. Shafiq, Pericàs, M., Navarro, N., and Ayguadé, E., BSArc: Blacksmith Streaming Architecture for HPC Accelerators, ACM International Conference on Computing Frontiers. Cagliary (Italy), 2012.
R. Bertran, González, M., Martorell, X., Navarro, N., and Ayguadé, E., Counter-Based Power Modeling Methods: Top-Down vs. Bottom-Up, The Computer Journal. 2012.
N. Vujic, Cabarcas, F., González, M., Ramirez, A., Martorell, X., and Ayguadé, E., DMA++: On the Fly Data Realignment for On-Chip Memories, Computers, IEEE Transactions on, vol. 61. pp. 237 -250, 2012.
N. Vujic, Álvarez, L., González, M., Martorell, X., and Ayguadé, E., DMA-circular: an enhanced high level programmable DMA controller for optimized management of on-chip local memories, Proceedings of the 9th conference on Computing Frontiers. ACM, New York, NY, USA, pp. 113–122, 2012.
R. Bertran, Becerra, Y., Carrera, D., n, V. Ã. § B., González, M., Martorell, X., Navarro, N., Torres, J., and Ayguadé, E., Energy accounting for shared virtualized environments under DVFS using PMC-based power models, Future Generation Computer Systems, vol. 28. Elsevier, pp. 457 - 468, 2012.

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