CRISTAL KESTELMAN, ADRIAN

2012
Kestor, G., Gioiosa, R., Unsal, O., Cristal, A. & Valero, M. Hardware/Software Techniques for Assisted Execution Runtime Systems. The 2nd Workshop on Runtime Environments, Systems, Layering and Virtualized Environments (RESoLVE) (2012).
Gajinov, V. et al. Integrating Dataflow Abstractions into the Shared Memory Model. Computer Architecture and High Performance Computing (SBAC-PAD), 2012 IEEE 24th International Symposium on 243–251 (2012).
Gajinov, V. et al. Supporting Stateful Tasks in a Dataflow Graph. Proceedings of the 21st international conference on Parallel architectures and compilation techniques 435–436 (2012).
Stipić, S. et al. TagTM - accelerating STMs with hardware tags for fast meta-data access. DATE 39-44 (2012).
Negi, A., Armejach, A., Cristal, A., Unsal, O. & Stenström, P. Transactional prefetching: narrowing the window of contention in hardware transactional memory. Parallel Architectures and Compilation Techniques (PACT) 181-190 (2012).
Tomić, S., Cristal, A., Unsal, O. & Valero, M. Using Dynamic Runtime Testing for Rapid Development of Architectural Simulators. International Journal of Parallel Programming (2012).
Hayes, T., Palomar, O., Unsal, O., Cristal, A. & Valero, M. Vector Extensions for Decision Support DBMS Acceleration. The 45th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO45) 166-176 (2012). doi:10.1109/MICRO.2012.24
2011
Seyedi, A. et al. Circuit Design of a Dual-Versioning L1 Data Cache. Integration The VLSI Journal (2011).
Seyedi, A. et al. Circuit Design of a Dual-Versioning L1 Data Cache for Optimistic Concurrency. 21st Great Lakes Symposium on Very Large Scale Integration (GLSVLSI'11) (2011).
Akpinar, E., Tomić, S., Cristal, A., Unsal, O. & Valero, M. A Comprehensive Study of Conflict Resolution Policies in Hardware Transactional Memory. 6th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT) (2011).
Villavieja, C. et al. DiDi: Mitigating The Performance Impact of TLB Shootdowns Using A Shared TLB Directory. Parallel Architectures and Compilation Techniques (PACT) (2011).
Yalcin, G., Unsal, O., Cristal, A. & Valero, M. FaulTM-multi: Fault Tolerance for Multithreaded Applications Running on Transactional Memory Hardware. Workshop on Wild and Sane Ideas in Speculation and Transactions (2011).
Yalcin, G., Unsal, O., Cristal, A. & Valero, M. FIMSIM: A fault injection infrastructure for microarchitectural simulators. 29th International Conference on Computer Design (ICCD) 431–432 (2011).
Arcas, O., Sönmez, N., Unsal, O., Cristal, A. & Valero, M. A Flexible Hybrid Transactional Memory Multicore on FPGA. Jornadas de Paralelismo 2011 283–289 (2011).
Sonmez, N. et al. From plasma to beefarm: Design experience of an FPGA-based multicore prototype. Reconfigurable Computing: Architectures, Tools and Applications 350–362 (2011).
Sonmez, N. et al. From Plasma to BeeFarm: Design Experience of an FPGA-based Multicore Prototype. ARC'11 (2011).
Sönmez, N. et al. From Plasma to BeeFarm: Design Experience of an FPGA-based Multicore Prototype. The 7th International Symposium on Applied Reconfigurable Computing (ARC 2011) 1–10 (2011).
Gajinov, V. et al. Integrating Dataflow Abstractions into Transactional Memory. First Workshop on Systems for Future Multi-Core Architectures (SFMA'11) 1–6 (2011).
Gajinov, V. et al. Integrating dataflow abstractions into transactional memory. Systems for Future Multi-Core Architectures (SFMA'11) (2011).
Kestor, G., Dalessandro, L., Cristal, A., Scott, M. L. & Unsal, O. Interchangeable Back Ends for STM Compilers. 6th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT) (2011).
Markovic, N. et al. Object Oriented execution Model (OOM). New Directions in Computer Architecture (NDCA-2) (2011).
Markovic, N. et al. Object Orienteed Execution Model (OOM). 2nd Workshop on New Directions in Computer Architecture (NDCA-2) Held in Conjunction with the 38th International Symposium on Computer Architecture (ISCA-38) (2011). at <http://ndca2.saclay.inria.fr/papers/markovic.pdf>
Tomić, S., Cristal, A., Unsal, O. & Valero, M. Rapid Development of Error-Free Architectural Simulators using Dynamic Runtime Testing. 23rd International Symposium on Computer Architecture and High Performance Computing (2011).
Kestor, G. et al. RMS-TM: A Comprehensive Benchmark Suite for Transactional Memory Systems. International Conference on Performance Engineering (ICPE 2011) (2011).
Kestor, G. et al. STM2: A Parallel STM for High Performance Simultaneous Multi-Threading Systems. The 20th IEEE International Conference on Parallel Architectures and Compilation Techniques (PACT) (2011).
Yalcin, G., Unsal, O., Cristal, A., Hur, I. & Valero, M. SymptomTM: Symptom Based Error Detection and Recovery Using Hardware Transactional Memory. Parallel Architectures and Compilation Techniques (PACT) 199–200 (2011).
Sonmez, N. et al. TMbox: A Flexible and Reconfigurable 16-Core Hybrid Transactional Memory System. Proc. FCCM '11 146–153 (2011).
Sönmez, N. et al. TMbox: A Flexible and Reconfigurable 16-core Hybrid Transactional Memory System. The 19th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2011) 1–8 (2011).
Sonmez, N. et al. {TMbox}: A Flexible and Reconfigurable 16-Core Hybrid Transactional Memory System. Proc. FCCM '11 146–153 (2011).
Hayes, T., Palomar, O., Unsal, O., Cristal, A. & Valero, M. True Vector Extensions for Decision Support DBMS Acceleration. (2011).
Armejach, A. et al. Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory. Parallel Architectures and Compilation Techniques (PACT) 360–370 (2011).
2010
Vallejo, E. et al. Architectural Support for Fair Reader-Writer Locking. International Symposium on Microarchitecture (2010).
Zyulkyarov, F., Harris, T., Unsal, O., Cristal, A. & Valero, M. Debugging Programs that use Atomic Blocks and Transactional Memory. 15th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming (PPoPP 2010) (2010).
Harris, T., Tomić, S., Cristal, A. & Unsal, O. Dynamic Filtering: Multi-Purpose Architecture Support for Language Runtime Systems. 5th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'10) 39–52 (ACM, 2010).
Yalcin, G., Unsal, O., Hur, I. & Cristal, A. FaulTM: Fault-Tolerance Using Hardware Transactional Memory. Workshop on Parallel Execution of Sequential Programs on Multi-core Architecture (PESPMA) (2010).
Karakostas, V. et al. RMS-TM: A challenging transactional memory benchmark suite. Advanced Computer Architecture and Computation for Embedded Systems (ACACES 2010) (2010).
Armejach, A. et al. ShadowHTM: Using a dual-bitcell L1 Data Cache to Improve Hardware Transactional Memory Performance. (2010).
Miletić, N. et al. Transactification of a real-world system library. 5th ACM SIGPLAN Workshop on Transactional Computing - TRANSACT 2010 (2010).
Felber, P. et al. The Velox Transactional Memory Stack. Micro, IEEE 30, 76 -87 (2010).
2009
Markovic, N., González, R., Unsal, O., Valero, M. & Cristal, A. Architecture for Object-Oriented Programming Model. (2009). at <http://capinfo.e.ac.upc.edu/PDFs/dir11/file003491.pdf>
Zyulkyarov, F. et al. Atomic Quake: Using Transactional Memory in an Interactive Multiplayer Game Server. 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 2009) 25–34 (ACM, 2009).
Sanyal, S., Roy, S., Cristal, A., Unsal, O. & Valero, M. Clock gate on abort: Towards energy-efficient hardware Transactional Memory. 23rd IEEE International Symposium on Parallel {&} Distributed Processing (IPDPS 2009) 1–8 (IEEE, 2009).
Sanyal, S., Roy, S., Cristal, A., Unsal, O. & Valero, M. Dynamically Filtering Thread-Local Variables in Lazy-Lazy Hardware Transactional Memory. 11th IEEE International Conference on High Performance Computing and Communications, HPCC 2009 171–179 (IEEE, 2009).
Tomić, S. et al. EazyHTM, Eager-Lazy Hardware Transactional Memory. 42nd International Symposium on Microarchitecture (MICRO) (2009). at <http://capinfo.e.ac.upc.edu/PDFs/dir07/file003458.pdf>
Sönmez, N., Cristal, A., Unsal, O., Harris, T. & Valero, M. Profiling Transactional Memory applications on an Atomic Block Basis: A Haskell case study. Second Workshop on Programmability Issues for Multi-Core Computers (MULTIPROG 2009) (2009).
Gajinov, V. et al. QuakeTM: parallelizing a complex sequential application using transactional memory. Proceedings of the 23rd international conference on Supercomputing 126–135 (2009).
Gajinov, V. et al. QuakeTM: parallelizing a complex sequential application using transactional memory. 23rd international conference on Supercomputing (ICS 2009) 126–135 (ACM, 2009). at <http://capinfo.e.ac.upc.edu/PDFs/dir21/file003443.pdf>
Kestor, G., Stipić, S., Unsal, O., Cristal, A. & Valero, M. RMS-TM: A Transactional Memory Benchmark for Recognition, Mining and Synthesis Applications. 4th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT 2009) (2009). at <http://capinfo.e.ac.upc.edu/PDFs/dir12/file003695.pdf>

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