MARTORELL BOFILL, XAVIER

2014
Filgueras, A. et al. OmpSs@Zynq All-Programmable SoC Ecosystem. 22nd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (2014). at <http://www.eecg.utoronto.ca/FPGA2014/>
2013
Bertran, R., González, M., Martorell, X., Navarro, N. & Ayguadé, E. Counter-Based Power Modeling Methods: Top-Down vs. Bottom-Up. Computer Journal 56, 198–213 (2013).
Alvarez, L. et al. Hardware-Software Coherence Protocol for the Coexistence of Caches and Local Memories. IEEE Transactions on Computers 99, 1 (2013).
Filgueras, A. et al. Heterog eneous tasking on SMP/FPGA SoCs: the case of OmpSs and the Zynq. workshop @VLSI-SOC: W1A (Special Session 2): Are processors the NAND gats of the future? (2013). at <http://ieeexplore.ieee.org/xpl/abstractAuthors.jsp?tp=&arnumber=6673293&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D6673293>
Filgueras, A. et al. Heterogeneous tasking on SMP/FPGA SoCs: the case of OmpSs and the Zynq. 21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) 290–291 (2013).
Bueno-Hedo, J., Badia, R. M., Martorell, X., Ayguadé, E. & Labarta, J. Implementing OmpSs Support for Regions of Data in Architectures with Multiple Address Spaces. 27th International Conference on Supercomputing (ICS) 359–368 (2013).
Alvanos, M., Farreras, M., Tiotto, E., Amaral, J. N. & Martorell, X. Improving Communication in PGAS Environments: Static and Dynamic Coalescing in UPC. 27th International Conference on Supercomputing (ICS) 129–138 (2013). doi:10.1145/2464996.2465006
Alvanos, M. et al. Improving Performance of All-to-all Communication Through Loop Scheduling in PGAS Environments. 27th International Conference on Supercomputing (ICS) 457–458 (2013).
Caballero, D., Duran, A. & Martorell, X. An OpenMP Barrier Using SIMD Instructions for Intel Xeon Phi(TM) Coprocessor. 9th International Workshop on OpenMP (IWOMP) 99–113 (2013).
Teruel, X. et al. A Proposal for Task-Generating Loops in OpenMP. 9th International Workshop on OpenMP (IWOMP) 1–14 (2013).
Figueroa, R. C., Lopez, M. A., Gonzalez, E. J. P., Gil, M. & Martorell, X. Rendering of Bezier surfaces on handheld devices. Journal of WSCG (Plzen, Print) 21, 205–214 (2013).
Tillenius, M., Larsson, E., Badia, R. M. & Martorell, X. Resource-aware task scheduling. 4th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures (PARMA) 6–11 (2013).
Bertran, R., Gonzalez, M., Martorell, X., Navarro, N. & Ayguade, E. A Systematic Methodology to Generate Decomposable and Responsive Power Models for CMPs. IEEE Transactions on Computers 62, 1289-1302 (2013).
2012
Oro, D., Fernandez, C., Segura, C., Martorell, X. & Hernando, J. Accelerating Boosting-based Face Detection on GPUs. Proc. of the 41st International Conference on Parallel Processing (2012). doi:10.1109/ICPP.2012.65
Alvanos, M., Tiotto, E., Farreras, M. & Martorell, X. Automatic Communication Coalescing for Irregular Computations in UPC Language. Proc. of the 2012 CASCON conference (2012). at <https://www-927.ibm.com/ibm/cas/cascon/paper.jsp>
Royuela, S., Duran, A. & Martorell, X. Compiler automatic discovery of OmpSs task dependencies. Proceedings of the workshop on Languages and Compilers for Parallel Computing (2012). at <http://www.kasahara.cs.waseda.ac.jp/lcpc2012/?page_id=98>
Bertran, R., González, M., Martorell, X., Navarro, N. & Ayguadé, E. Counter-Based Power Modeling Methods: Top-Down vs. Bottom-Up. The Computer Journal (2012). doi:10.1093/comjnl/bxs116
Vujic, N. et al. DMA++: On the Fly Data Realignment for On-Chip Memories. Computers, IEEE Transactions on 61, 237 -250 (2012).
Vujic, N., Álvarez, L., González, M., Martorell, X. & Ayguadé, E. DMA-circular: an enhanced high level programmable DMA controller for optimized management of on-chip local memories. Proceedings of the 9th conference on Computing Frontiers 113–122 (2012). doi:10.1145/2212908.2212925
Bertran, R. et al. Energy accounting for shared virtualized environments under DVFS using PMC-based power models. Future Generation Computer Systems 28, 457 - 468 (2012).
Klemm, M. et al. Extending OpenMP* with vector constructs for modern multicore SIMD architectures. Proceedings of the 8th international conference on OpenMP in a Heterogeneous World 59–72 (2012). doi:10.1007/978-3-642-30961-8_5
Álvarez, L. et al. Hardware-software coherence protocol for the coexistence of caches and local memories. Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis 89:1–89:11 (2012). at <http://dl.acm.org/citation.cfm?id=2388996.2389117>
Ayguadé, E. et al. Programming Multi-Core and Many-Core Computing Systems (Wiley Series on Parallel and Distributed Computing) (John Wiley & Sons, Inc., 2012). at <http://www.par.univie.ac.at/~pllana/manycore_book/>
Servat, H. et al. On the Instrumentation of OpenMP and OmpSs Tasking Constructs. Euro-Par 2012: Parallel Processing Workshops. Lecture Notes in Computer Science 7640, 414-428 (2012).
Bueno-Hedo, J. et al. Productive Programming of GPU Clusters with OmpSs. 26th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2012) 557-568 (2012). doi:http://doi.ieeecomputersociety.org/10.1109/IPDPS.2012.58
2011
González, C., Fernández, M., Jiménez, D., Álvarez, C. & Martorell, X. Automatic Generation and Testing of Application Specific Hardware Accelerators on a New Reconfigurable OpenSPARC Platform. 5th HiPEAC Workshop on Reconfigurable Computing (WRC 2011) 85-94 (2011).
González, C., Fernández, M., Jiménez, D., Álvarez, C. & Martorell, X. Automatic generation of application-specific hardware accelerators on OpenSPARC. International Symposium on Code Generation and Optimization (CGO 2011) (2011). at <http://capinfo.e.ac.upc.edu/PDFs/dir28/file003972.pdf>
Royuela, S., Ferrer, R., Duran, A. & Martorell, X. Compiler Analysis for Improving OpenMP Code Generation. ACACES 2011. Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems (2011). at <http://www.hipeac.net/summerschool>
Álvarez, L. et al. Design space exploration for aggressive core replication schemes in CMPs. Proceedings of the 20th international symposium on High performance distributed computing 269–270 (2011). doi:http://doi.acm.org/10.1145/1996130.1996169
Bertran, R. et al. Energy accounting for shared virtualized environments under DVFS using PMC-based power models. Future Generation Computer Systems 28, 457 - 468 (2011).
Alvanos, M., Tiotto, E., Farreras, M. & Martorell, X. Improving communication in PGAS environments: Data prefetching and aggregation in UPC. 20th Annual International Conference hosted by the Centre for Advanced Studies & Research (CASCON 2011) (2011). at <https://www-927.ibm.com/ibm/cas/cascon/>
Ferrer, R. et al. Mercurium: Design Decisions for a S2S Compiler. Cetus Users and Compiler Infastructure Workshop in conjunction with PACT 2011 (2011).
Dadvand, P. et al. Migration of a Generic Multi-Physics Framework to HPC Environments. 23rd International Conference on Parallel Computational Fluid Dynamics (2011). at <http://parcfd2011.bsc.es/sites/default/files/abstracts/id124-pooyan.pdf>
Duran, A. et al. OmpSs: A PROPOSAL FOR PROGRAMMING HETEROGENEOUS MULTI-CORE ARCHITECTURES. Parallel Processing Letters 21, 173-193 (2011).
Ferrer, R. et al. Optimizing the Exploitation of Multicore Processors and GPUs with OpenMP and OpenCL. Lecture Notes in Computer Science 6548/2011, 215-229 (2011).
Bueno, J. et al. Poster: programming clusters of GPUs with OMPSs. Proceedings of the international conference on Supercomputing 378–378 (2011). doi:http://doi.acm.org/10.1145/1995896.1995961
Bueno, J. et al. Productive Cluster Programming with OmpSs. Euro-Par 2011 Parallel Processing 6852, 555-566 (2011).
Ciobanu, C., Martorell, X., Kuzmanov, G. K., Ramirez, A. & Gaydadjiev, G. N. Scalability Evaluation of a Polymorphic Register File: A CG Case Study. Architecture of Computing Systems - ARCS 2011 13-25 (2011). doi:10.1007/978-3-642-19137-4.
Caballero, D., Ferrer, R., Duran, A., Martorell, X. & Ayguadé, E. User-directed Auto-vectorization in OmpSs. ACACES 2011. Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems (2011). at <http://www.hipeac.net/summerschool>
2010
Patt, Y. N., Foglia, P., Duesterwald, E., Faraboschi, P. & Martorell, X. 5th Int. Conf. on High Performance Embedded Architectures and Compilers (HiPEAC 2010). (2010). at <http://www.informatik.uni-trier.de/ ley/db/conf/hipeac/hipeac2010.html>
Beltran, V., Martorell, X., Torres, J. & Ayguadé, E. Accelerating Software Memory Compression on the Cell/B.E. (2010).
Beltran, V., Martorell, X., Torres, J. & Ayguadé, E. Accelerating Software Memory Compression on the Cell/B.E. (2010).
Bertran, R. et al. Accurate Energy Accounting for Shared Virtualized Environments using PMC-based Power Modeling Techniques. (2010).
Munk, H. et al. ACOTES Project: Advanced Compiler Technologies for Embedded Streaming Harm Munk. International Journal of Parallel Programming 39, 397-450 (2010).
Ferrer, R., Beltran, V., González, M., Martorell, X. & Ayguadé, E. Analysis of Task Offloading for Accelerators. (2010). at <http://www.springerlink.com/content/978-3-642-11514-1>
Vujic, N., González, M., Martorell, X. & Ayguadé, E. Automatic Prefetch and Modulo Scheduling Transformations for the Cell BE Architecture. (2010). at <http://doi.ieeecomputersociety.org/10.1109/TPDS.2009.97>
Bertran, R., González, M., Martorell, X., Navarro, N. & Ayguadé, E. Decomposable and Responsive Power Models for Multicore Processors using Performance Counters. (2010). at <http://doi.acm.org/10.1145/1810085.1810108>
Vujic, N. et al. DMA++: On the Fly Data Realignment for On-Chip Memories. 16th IEEE International Symposium on High-Performance Computer Architecture (2010).
Ayguadé, E. et al. Extending OpenMP to Survive the Heterogeneous Multi-core Era. (2010).
Jiménez, D. A. et al. GPFPGA: entorno para la generación automática de códigos HDL portables entre FPGAs. (2010). at <http://jcraconf.org/JCRA2010/>

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