Computer Sciences

The scientific mission of the Computer Sciences Department is to influence the way future computing machines are built, programmed and used, bridging what computer technology offers and application requirements, in strong collaboration with companies leading the field.
The combination of broad coverage of all facets of computer systems design and programming along with in-depth expertise in each area are somewhat unique amongst supercomputing centres. This unique strength of the BSC-CNS has attracted leading computing companies to invest heavily in collaborative systems design R&D projects despite the relative youth of the Centre.




The main objective of the department is to make advance in the hardware and software technologies available to build and efficiently use supercomputing infrastructures, bridging the gap between computer architecture and application requirements. The department is proposing novel architectures for processor, memory hierarchy and their interconnection, programming models and their efficient implementation, tools for understanding and predicting performance and execution environments and resource managers at different levels in the system, from multicore architectures and accelerators, shared and distributed memory architectures, distributed systems and Cloud.

A second objective of the Department is to do research in collaboration with computing system providers. In this direction, the BSC-CNS has currently active collaboration agreements with IBM Research, Microsoft Research, Intel and NVIDIA, in areas related with computer architecture, tools for performance analysis, programming models and execution environments.

Finally, the Computer Sciences department wants to keep a very close interaction between the different departments of the BSC-CNS. The department will bring the technologies developed to the application departments and groups in the BSC-CNS and will favor its efficient use. This synergy, along with the available experience in the optimization of applications (both numeric and non-numeric) will reduce significantly the huge simulation times normally required. In addition, new applications for future Exascale architectures with several orders of magnitude more processors are investigated. On the other hand, the application groups at BSC-CNS will show their needs that will drive the research at hardware level for the future supercomputers (processors, memory, and their interconnection following performance, cost, and power consumption criteria), at base-software level (tools, compilers, and programming models that will ease the programming and optimization of applications), as well as the basic-algorithm level that is the building block for applications.

Research Lines: 

The Computer Sciences Department is structured in 10 research teams. Although each team has its own specialized lines of research, the teams come together to collaborate on larger projects (EU or with companies) that require vertical integration. This vertical interaction is considered critical to the quality and success of the research, as feedback between the different teams enables application programmers to influence the direction of future systems architecture while better knowledge of architectures improves the design and implementation of novel programming models, execution environments and applications.

    Francisco J. Cazorla

    The Computer Architecture and Operating System (CAOS) group focuses on real-time embedded systems and high-performance computing at both architecture and operating system level, analyzing the interaction between hardware and software. The group's research topics include design for low power and low temperature, high-performance power-efficient multicore/multithreaded processors, performance- and power-aware OS schedulers, load balancing for HPC applications, predictability and time analyzability of real-time systems.

    Jesús Labarta and Eduard Ayguadé

    The team explores different design alternatives of processor and system architectures for future generation supercomputer systems. At the lowest level the exploitation of different levels of parallelism in the processor (instruction level parallelism, data level parallelism, or thread level parallelism) needs to be investigated taking into account performance/energy/cost trade-offs. At the multicore and multiprocessor level issues related with the heterogeneity of the cores, memory organization and communication protocols are considered. Novel architectures based on the use of components from the mobile/embedded market are being investigated as part of the Mont-Blanc project.

    Osman Unsal and Adrian Cristal

    The team is doing research on architectural support to novel programming models and execution environments for future multicore architectures. The Group constitutes the core of the BSC-Microsoft Research Centre which focuses its research on lowering the programmability wall raised by new multicore architectures; research areas include Transactional Memory, hardware support for programming language runtimes, synchronization, low-power vector processors, and the use of Transactional Memory for other research domains, such as reliability.

    Judit Giménez

    The team is working on the design of tools to instrument, analyze and predict the behaviour of parallel applications on parallel systems, as well as methodologies and procedures. The main goal of the team is to provide technology to understand the issues that determine the actual performance of a parallel application or that contribute to its bottlenecks. This is extremely important both in novel homogeneous and heterogeneous multi-core architectures as well as in highly scalable cluster systems. Flexibility, simplicity and the appropriate combination of qualitative and quantitative information are some of the issues considered in the design of these tools. Scalability and ability of handling the high volumes of performance data are also two issues that need to be considered to handle long running applications that use hundred/thousand processors.

    Xavier Martorell

    The team explores new programming models and their efficient implementation for current and future architectures, ranging from multicore SMP architectures with support for accelerators (GPUs, FPGAs, ...) to clusters of SMPs, and exascale systems. This exploration is supported with the development of powerful compiler (Mercurium) and runtime (NANOS++) prototypes. The team also explores the usability of these programming models in different application scenarios, proposing extensions to the standards (e.g. OpenMP) to accommodate the requirements of novel applications for supercomputer systems.

    Rosa Mª Badia

    The team is researching new programming and execution models, and resource management for distributed computing. The team explores solutions in order to simplify application development, enable dynamic exploitation of parallelism at runtime and perform combined scheduling decisions at different levels. The team is developing COMPSs and StarSs programming models.

    Jordi Torres

    The team performs high-level research in today’s eBusiness applications that have to deal with critical IT challenges in areas such as Big Data, Cloud Computing, Business Analytics, High Performance Computing and Sustainable Computing.

    David Carrera

    The team focus is to accelerate the processing of data-driven workloads, including large analytics as well as stream processing, in heterogeneous execution frameworks.

    Toni Cortés

    The team focuses on finding appropriate solutions to the scalability of parallel file systems in large installations (in which very large volumes od data need to be generated and accessed) and file systems for the grid that solve the problems currently found (data location, replication and striping) and that will make these environments more efficient.

    Mario Nemirovsky

    The team is conducting research on the massive multithreaded architectures focused on network applications. Networks and their applications are a fundamental part of the Internet from its core to its edge. Additionally, the Network and its applications play a critical role in today’s data centres and High Performance Systems (HPS). In these two directions, the Network Group concentrates in the study of these systems and the definition of new network architectures.

  • Vassil Alexandrov The group was created in 2011 and the research focuses  on  novel  mathematical methods and algorithms for extreme scale computing, especially solving problems with uncertainty on large scale computing systems. The main expertise is in the area of Computational Science, scalable algorithms for advanced computer architectures, Monte Carlo methods  and  algorithms. In particular, scalable Monte Carlo algorithms are developed for Linear Algebra, Computational Finance, Environmental Models, Computational Biology, etc. In addition the research focuses on scalable and fault-tolerant and resilient algorithms for extreme scale (peta and exa scale) architectures.



Pérez H, Hernández B, Rudomín I, Ayguadé E. Scaling Crowd Simulations in a GPU Accelerated Cluster. In: Gitler I, Klapp J High Performance Computer Applications. 6th International Conference, ISUM 2015, Mexico City, Mexico, March 9-13, 2015, Revised Selected Papers. Vol. 595. High Performance Computer Applications. 6th International Conference, ISUM 2015, Mexico City, Mexico, March 9-13, 2015, Revised Selected Papers. Cham: Springer International Publishing; 2016. pp. 461–472. Available from:
Tan X. Performance analysis of a hardware accelerator of dependence management for task-based dataflow programming models Bosch J, Jiménez-González D, Alvarez-Martinez C, Ayguadé E, Valero M. 2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) [Internet]. 2016 :225 - 234. Available from:
Meyer H, Sancho JCarlos. DimLightSim: Optical/Electrical Network Simulator for HPC Applications. Proceedings of the 3rd Barcelona Supercomputing Center Doctoral Synposium. 2016 :1–2.
Ratković I, Palomar O, Stanic M, Ünsal O, Cristal A, Valero M. A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques. ISLPED '16 Proceedings of the 2016 International Symposium on Low Power Electronics and Design [Internet]. 2016 :362-367. Available from:


Camarero C, Vallejo E, Beivide R. Topological Characterization of Hamming and Dragonfly Networks and Its Implications on Routing. 11th High Performance and Embedded Architecture and Compilation (HiPEAC-2015). 2015 .
Cortes T, Queralt A, Martí J, Labarta J. DataClay: Towards Usable and Shareable Storage. Big Data and Extreme-Scale Computing (BDEC). 2015 .