SMP superscalar

Overview: 

Current chip fabrication technologies allow to place several million transistors in a chip, enabling more complex designs each time. However, there are several issues that discourage the design of more complex uniprocessors: the increase in heat generation, the diminishing instruction-level parallelism gains, almost unchanged memory latency, the inherent complexity of designing a single core with a large number of transistors and the economical costs derived of this design. For these reasons, the current trend on chip manufacturing is to place multiple slower processor cores (multi-core) on a chip.

While current chips have up to 8 cores, this trend may lead in the future to chips with as much as 1000 cores (many-cores). With such a perspective, the availability of suitable programming environments (i.e., compilers, communication libraries, and tools) offering a human-centric approach to exploiting parallelism will become essential for the programming productivity of multicore systems.

SMP superscalar (SMPSs) is a programming environment focused on the ease of programming, portability and flexibility that is based on Cell superscalar (CellSs). While CellSs is tailored for the Cell/B.E. processor, the solution we present is tailored for multi-cores and Symmetric Multiprocessors (SMP) in general.

SMP superscalar (SMPSs) addresses the automatic exploitation of the functional parallelism of a sequential program in multicore and SMP environments. The focus in on the portability, simplicity and flexibility of the programming model. Based on a simple annotation of the source code, a source to source compiler generates the necessary code and a runtime library exploits the existing parallelism by building at runtime a task dependency graph. The runtime takes care of scheduling the tasks and handling the associated data. Besides, a temporal locality driven task scheduling has been implemented.

The SMPSs programming environment consists of a source to source compiler and a supporting runtime library. The compiler translates C code with the aforementioned annotations into common C code with c

Objectives: 

In this project we focus on multicore and SMP architectures in general. With this goal, we propose the SMP Superscalar framework (SMPSs), which is based in a source to source compiler and a runtime library. The supported programming model allows the programmers to write sequential applications and the framework is able to exploit the existing concurrency and to use the different processors by means of a automatic parallelization at execution time. The only requirement we place on the programmer is that annotations (somehow similar to the OpenMP ones) are written before the declaration of some of the functions used in the application. Similarly to OpenMP, an annotation (or directive) before a piece of code indicates that this part of code will be executed out of order in any processor.

An annotation before a function does not indicate that this is a parallel region. It just indicates that it is a function that can be run in outside of the main program flow. To be able to exploit the parallelism, the SMPSs runtime builds a data dependency graph where each node represents an instance of an annotated function and edges between nodes denote data dependencies. From this graph, the runtime is able to schedule for execution independent nodes to different processors at the same time. Techniques imported from the computer architecture area like the data dependency analysis, data renaming and data locality exploitation are applied to increase the performance of the application.

Summarizing, we focus on offering tools that enable a portable, flexible and high-level programming model for multicores and SMPs.

Additional Information: 
  • Contact

                        rosa.m.badia.at.bsc.es