Publications

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2008
J. J. Alastruey, Cazorla, F., Monreal, T., Viñals, V., and Valero, M., Selection of the Register File Size and the Resource Allocation Policy on SMT Processors. In 20th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). Campo Grande, Brazil, 2008.
2006
J. J. Alastruey, Monreal, T., Viñals, V., and Valero, M., Microarchitectural Support for Speculative Register Renaming. IPDPS07. IEEE International Parallel and Distributed Processing Sympsium. Long Beach, USA, 2006.
J. J. Alastruey, Monreal, T., Viñals, V., and Valero, M., Speculative Early Register Release. ACM International Conference on Computing Frontiers, 2006.
2005
J. J. Alastruey, Monreal, T., Viñals, V., and Valero, M., Efficient Register File Management in High-ILP Processors. ACACES 2005, Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems, 2005.
T. Monreal, Viñals, V., González, A., and Valero, M., Hardware Support for Early Register Release. IJHPCN. International Journal on High Performance and Networking, 2005.