Publications

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2013
C. Camarero, Vallejo, E., Martinez, C., Moreto, M., and Beivide, R., Task Mapping in Rectangular Twisted Tori, Proceedings of the High Performance Computing Symposium. Society for Computer Simulation International, San Diego, CA, USA, pp. 15:1–15:11, 2013.
2008
E. Vallejo, Harris, T., Cristal, A., Unsal, O., and Valero, M., Hybrid Transactional Memory to accelerate safe lock-based transactions, 3rd ACM SIGPLAN Workshop on Transactional Computing (TRANSACT 2008). Salt Lake City, UT, United States, 2008.
E. Vallejo, Sanyal, S., Harris, T., Vallejo, F., Beivide, R., Unsal, O., Cristal, A., and Valero, M., Towards Fair Scalable Locking, Workshop on Exploiting Parallelism with Transactional Memory and other Hardware Assisted Methods (EPHAM 2008). Boston, MA, United States, 2008.
2007
M. Galluzzi, Vallejo, E., Cristal, A., Vallejo, F., Beivide, R., Stenström, P., Smith, J. E., and Valero, M., Implicit Transactional Memory in Kilo-Instruction Multiprocessor, The Twelfth Asia-Pacific Computer Systems Architecture Conference (ACSAC 2007). Springer, Seoul, South Korea, pp. 339–353, 2007.
2006
E. Vallejo, Galluzzi, M., Cristal, A., Vallejo, F., Beivide, R., Stenström, P., Smith, J. E., and Valero, M., Chip Multiprocessors with Implicit Transactions, 2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06). Academia Press, L'Aquila, Italy, pp. 167–170, 2006.