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M. Moreto, Cazorla, F., Ramirez, A., and Valero, M., Explaining Dynamic Cache Partitioning Speed Ups, IEEE Computer Architecture Letters, vol. 6, no. 1. pp. 1-12, 2007.
P. A. Castillo, Merelo, J. J., Moreto, M., Cazorla, F., Valero, M., Mora, A. M., Laredo, J. L., and McKee, S. A., Evolutionary system for prediction and optimization of hardware architecture performance. In IEEE Congress on Evolutionary Computation (CEC). Hong Kong, 2008.
T. Grass, Rico, A., Casas, M., Moreto, M., and Ramirez, A., Evaluating Execution Time Predictability of Task-Based Programs, 7th International Workshop on Multi-/Many-Core Computing Systems. Springer International Publishing, Porto, Portugal, pp. 218–229, 2014.