Publications

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Workshops
R. Ferrer, Beltran, V., González, M., Martorell, X., and Ayguadé, E., Achieving High Memory Performance from Heterogeneous Architectures with the SARC Programming Model. 10th Workshop on Memory Performance: Dealing with Applications, systems, and architecture (MEDEA 2009), 2009.
N. Vujic, Álvarez, L., González, M., Martorell, X., and Ayguadé, E., Adaptive and Speculative Memory Consistency Support for Multi-core Architectures with On-Chip Local Memories. Proceedings of the 22nd International Workshop on Languages and Compilers for Parallel Computing, 2009.
R. Gayatri, Badia, R. M., and Ayguadé, E., Analysis of the overheads incurred due to speculation in a task based programming model, Eight Workshop on Programmability Issues for Heterogeneous Multicores. 2015.
N. Vujic, González, M., Martorell, X., and Ayguadé, E., Automatic Pre-Fetch and Modulo Scheduling Transformations for the Cell BE Architecture. Proceedings of the 21st Annual Workshop Languages and Compilers for Parallel Computing (LCPC'08), 2008.
J. Torres, Ayguadé, E., Carrera, D., Guitart, J., Beltran, V., Becerra, Y., Badia, R. M., Labarta, J., and Valero, M., BSC contributions in Energy-aware Resource Management for Large Scale Distributed Systems, 1st Year Workshop of the COST Action IC0804 on Energy Efficiency in Large Scale Distributed Systems. pp. 76-79, 2010.
R. Vidal, Casas, M., Moreto, M., Chasapis, D., Ferrer, R., Martorell, X., Ayguadé, E., Labarta, J., and Valero, M., Evaluating the Impact of OpenMP 4.0 Extensions on Relevant Parallel Workloads, International Workshop on OpenMP (IWOMP) , no. Lecture Notes in Computer Science. LNCS, pp. 60-72, 2015.
R. Ferrer, González, M., Silla, F., Martorell, X., and Ayguadé, E., Evaluation of Memory Performance on the Cell BE with the SARC Programming Model. Proceedings of the 9th Workshop on Memory Performance: Dealing with Applications, systems, and architecture (MEDEA'08), 2008.
G. Almasi, Ayguadé, E., Cascaval, C., Castaños, J., Labarta, J., Martínez, F., Martorell, X., and Moreira, J., Evaluation of OpenMP for the Cyclops Mulithreaded Architecture. International Workshop on OpenMP Applications and Tools (WOMPAT2003), 2003.
A. Duran, Corbalán, J., and Ayguadé, E., Evaluation of OpenMP Task scheduling strategies. Proceedings of the 4thInternational Workshop on OpenMP (IWOMP'08), 2008.
J. Balart, Duran, A., González, M., Martorell, X., Ayguadé, E., and Labarta, J., Experiences parallelizing a Web Server with OpenMP. First International Workshop on OpenMP (IWOMP 2005), 2005.
G. Ozen, Ayguadé, E., and Labarta, J., Exploring Dynamic Parallelism in OpenMP, Proceedings of the Second Workshop on Accelerator Programming Using Directives. ACM, New York, NY, USA, 2015.
A. Duran, Pérez, J. M., Ayguadé, E., Badia, R. M., and Labarta, J., Extending the OpenMP Tasking Model to Allow Dependent Tasks. proceedings of International Workshop on OpenMP, 2008.
E. Ayguadé, Beyer, J., Duran, A., Ferrer, R., Haab, G., Li, K., and Massaioli, F., An extension to improve OpenMP tasking control. 6th International Workshop on OpenMP (IWOMP 2010), 2010.
R. Ferrer, Duran, A., Martorell, X., and Ayguadé, E., Harmonizing serial optimizations with OpenMP. 15th Workshop on Compilers for Parallel Computing (CPC-2010), 2010.
A. Rico, Cabarcas, F., Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., Implementation and Validation of a Cell Simulator using UNISIM, 3rd HiPEAC Industrial Workshop. 2007.
V. Beltran, Torres, J., and Ayguadé, E., Improving Disk Bandwidth-Bound Applications Through Main Memory Compression. MEDEA Workshop, 2007.
H. Servat, Teruel, X., Llort, G., Duran, A., Giménez, J., Martorell, X., Ayguadé, E., and Labarta, J., On the Instrumentation of OpenMP and OmpSs Tasking Constructs, Euro-Par 2012: Parallel Processing Workshops. Lecture Notes in Computer Science, vol. 7640. 5th Workshop on Productivity and Performance (PROPER 2012) Tools for HPC Application Development, Rhodes Island, Greece, pp. 414-428, 2012.
V. Gajinov, Milovanovic, M., Unsal, O., Cristal, A., Ayguadé, E., and Valero, M., Integrating Dataflow Abstractions into Transactional Memory, First Workshop on Systems for Future Multi-Core Architectures (SFMA'11). Salzburg, Austria, pp. 1–6, 2011.
V. Gajinov, Cristal, A., Milovanovic, M., Ayguadé, E., Unsal, O., and Valero, M., Integrating dataflow abstractions into transactional memory, Systems for Future Multi-Core Architectures (SFMA'11) . 2011.
N. Azuelos, Etsion, Y., Keidar, I., Zaks, A., and Ayguadé, E., Introducing Speculative Optimizations in Task Dataflow with Language Extensions and Runtime Support, 2nd Workshop on Data-Flow Execution Models for Extreme Scale Computing (DFM 2012), In conjunction with 21st International Conference on Parallel Architectures and Compilation Techniques (PACT-2012). Minneapolis MN (USA), 2012.
R. Ferrer, Royuela, S., Caballero, D., Duran, A., Martorell, X., and Ayguadé, E., Mercurium: Design Decisions for a S2S Compiler, Cetus Users and Compiler Infastructure Workshop in conjunction with PACT 2011. 2011.
F. Cabarcas, Rico, A., Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., A module based Cell processor simulator, 2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06). 2006.
R. M. Badia, Ferrer, R., Planas, J., Bellens, P., Duran, A., González, M., Martorell, X., Ayguadé, E., and Labarta, J., Optimizing the Exploitation of Multicore Processors and GPUs with OpenMP and OpenCL. on proceedings of the The 23rd International Workshop on Languages and Compilers for Parallel Computing (LCPC2010), 2010.
A. Duran, Ferrer, R., Costa, J., González, M., Martorell, X., Ayguadé, E., and Labarta, J., A Proposal for Error Handling in OpenMP. International Workshop on OpenMP (IWOMP 2006), 2006.
E. Ayguadé, Copty, N., Duran, A., Hoeflinger, J., Lin, Y., Massaioli, F., Su, E., Unnikrishnan, P., and Zhang, G., A proposal for task parallelism in OpenMP. Proceedings of the 3rd International Workshop on OpenMP (IWOMP'07), 2007.
A. Duran, Ferrer, R., Klemm, M., de Supinski, B. R., and Ayguadé, E., A Proposal for User-defined Reductions in OpenMP. 6th International Workshop on OpenMP (IWOMP 2010), 2010.
E. Ayguadé, Badia, R. M., Cabrera, D., Duran, A., González, M., Igual, F., Jiménez, D. A., Labarta, J., Martorell, X., Mayo, R., Pérez, J. M., and Quintana-Ortí, E. S., A Proposal to Extend the OpenMP Tasking Model for Heterogeneous Architectures. Proc. of the 5th International Workshop on OpenMP, 2009.
T. Hussain, Pericàs, M., and Ayguadé, E., Reconfigurable Memory Controller with Programmable Pattern Support, 5th HiPEAC Workshop on Reconfigurable Computing (WRC 2011). Heraklion, Greece, pp. 55–64, 2011.
J. Balart, González, M., Martorell, X., Ayguadé, E., and Labarta, J., Runtime Address Space Computation for SDSM Systems. The 19th Int. Workshop on Languages and Compilers for Parallel Computing (LCPC 2006), 2006.
E. Ayguadé, Blainey, B., Duran, A., Labarta, J., Martínez, F., Martorell, X., and Silvera, R., Is the SCHEDULE Clause Really Necessary in OpenMP?. International Workshop on OpenMP Applications and Tools (WOMPAT2003), 2003.
J. Planas, Badia, R. M., Ayguadé, E., and Labarta, J., SSMART: Smart Scheduling of Multi-architecture Tasks on Heterogeneous Systems, Proceedings of the Second Workshop on Accelerator Programming Using Directives. ACM, New York, NY, USA, pp. 1–11, 2015.
P. Carpenter, Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., A Streaming Machine Description and Programming Model, 7th Intl. Workshop on Embedded Computer Systems: Architectures, MOdeling, and Simulation (SAMOS VII). Springer-Verlag, pp. 107-116, 2007.
Y. Etsion, Ramirez, A., Badia, R. M., Ayguadé, E., Labarta, J., and Valero, M., Task Superscalar: Using Processors as Functional Units, USENIX Workshop on Hot Topics In Parallelism (HotPar). 2010.
X. Martorell, González, M., Duran, A., Balart, J., Ferrer, R., Ayguadé, E., and Labarta, J., Techniques Supporting threadprivate in OpenMP. 11th Int. Workshop on High-Level Parallel Programming Models and Supportive Environments (HIPS 2006), 2006.
M. Shafiq, Pericàs, M., and Ayguadé, E., A Template System for the Efficient Compilation of Domain Abstractions onto Reconfigurable Computers, 5th HiPEAC Workshop on Reconfigurable Computing (WRC 2011). Heraklion, Greece, pp. 65–74, 2011.
R. Ferrer, Duran, A., Martorell, X., and Ayguadé, E., Unrolling Loops Containing Task Parallelism. Proceedings of the 22nd International Workshop on Languages and Compilers for Parallel Computing, 2009.
D. Caballero, Ferrer, R., Duran, A., Martorell, X., and Ayguadé, E., User-directed Auto-vectorization in OmpSs, ACACES 2011. Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems . 2011.

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